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Linux 6.18.37 · Tracing

ETMv4 sysfs Linux driver programming reference

ETMv4 CoreSight driver의 sysfs file을 register·의존성·입력 형식별로 연결하고, address comparator type 고정, event·sequencer와 mode bitfield의 trace 기능 및 EL 제외 규칙을 설명합니다.

Source pathDocumentation/trace/coresight/coresight-etm4x-reference.rst
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약·해설

coresight-etm4x-reference.rst:1-827

ETMv4 CoreSight driver의 sysfs file을 register·의존성·입력 형식별로 연결하고, address comparator type 고정, event·sequencer와 mode bitfield의 trace 기능 및 EL 제외 규칙을 설명합니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 ===============================================
2 ETMv4 sysfs linux driver programming reference.
3 ===============================================
4
5 :Author: Mike Leach <mike.leach@linaro.org>
6 :Date: October 11th, 2019
7
8 Supplement to existing ETMv4 driver documentation.
9
10 Sysfs files and directories
11 ---------------------------
12
13 Root: ``/sys/bus/coresight/devices/etm<N>``
14
15
16 The following paragraphs explain the association between sysfs files and the
17 ETMv4 registers that they effect. Note the register names are given without
18 the ‘TRC’ prefix.
19
20 ----
21
22 :File: ``mode`` (rw)
23 :Trace Registers: {CONFIGR + others}
24 :Notes:
25 Bit select trace features. See ‘mode’ section below. Bits
26 in this will cause equivalent programming of trace config and
27 other registers to enable the features requested.
28
29 :Syntax & eg:
30 ``echo bitfield > mode``
31
32 bitfield up to 32 bits setting trace features.
33
34 :Example:
35 ``$> echo 0x012 > mode``
36
37 ----
38
39 :File: ``reset`` (wo)
40 :Trace Registers: All
41 :Notes:
42 Reset all programming to trace nothing / no logic programmed.
43
44 :Syntax:
45 ``echo 1 > reset``
46
47 ----
48
49 :File: ``enable_source`` (wo)
50 :Trace Registers: PRGCTLR, All hardware regs.
51 :Notes:
52 - > 0 : Programs up the hardware with the current values held in the driver
53 and enables trace.
54
55 - = 0 : disable trace hardware.
56
57 :Syntax:
58 ``echo 1 > enable_source``
59
60 ----
61
62 :File: ``cpu`` (ro)
63 :Trace Registers: None.
64 :Notes:
65 CPU ID that this ETM is attached to.
66
67 :Example:
68 ``$> cat cpu``
69
70 ``$> 0``
71
72 ----
73
74 :File: ``ts_source`` (ro)
75 :Trace Registers: None.
76 :Notes:
77 When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for trace session. Otherwise -1
78 indicates an unknown time source. Check trcidr0.tssize to see if a global timestamp is
79 available.
80
81 :Example:
82 ``$> cat ts_source``
83
84 ``$> 1``
85
86 ----
87
88 :File: ``addr_idx`` (rw)
89 :Trace Registers: None.
90 :Notes:
91 Virtual register to index address comparator and range
92 features. Set index for first of the pair in a range.
93
94 :Syntax:
95 ``echo idx > addr_idx``
96
97 Where idx < nr_addr_cmp x 2
98
99 ----
100
101 :File: ``addr_range`` (rw)
102 :Trace Registers: ACVR[idx, idx+1], VIIECTLR
103 :Notes:
104 Pair of addresses for a range selected by addr_idx. Include
105 / exclude according to the optional parameter, or if omitted
106 uses the current ‘mode’ setting. Select comparator range in
107 control register. Error if index is odd value.
108
109 :Depends: ``mode, addr_idx``
110 :Syntax:
111 ``echo addr1 addr2 [exclude] > addr_range``
112
113 Where addr1 and addr2 define the range and addr1 < addr2.
114
115 Optional exclude value:-
116
117 - 0 for include
118 - 1 for exclude.
119 :Example:
120 ``$> echo 0x0000 0x2000 0 > addr_range``
121
122 ----
123
124 :File: ``addr_single`` (rw)
125 :Trace Registers: ACVR[idx]
126 :Notes:
127 Set a single address comparator according to addr_idx. This
128 is used if the address comparator is used as part of event
129 generation logic etc.
130
131 :Depends: ``addr_idx``
132 :Syntax:
133 ``echo addr1 > addr_single``
134
135 ----
136
137 :File: ``addr_start`` (rw)
138 :Trace Registers: ACVR[idx], VISSCTLR
139 :Notes:
140 Set a trace start address comparator according to addr_idx.
141 Select comparator in control register.
142
143 :Depends: ``addr_idx``
144 :Syntax:
145 ``echo addr1 > addr_start``
146
147 ----
148
149 :File: ``addr_stop`` (rw)
150 :Trace Registers: ACVR[idx], VISSCTLR
151 :Notes:
152 Set a trace stop address comparator according to addr_idx.
153 Select comparator in control register.
154
155 :Depends: ``addr_idx``
156 :Syntax:
157 ``echo addr1 > addr_stop``
158
159 ----
160
161 :File: ``addr_context`` (rw)
162 :Trace Registers: ACATR[idx,{6:4}]
163 :Notes:
164 Link context ID comparator to address comparator addr_idx
165
166 :Depends: ``addr_idx``
167 :Syntax:
168 ``echo ctxt_idx > addr_context``
169
170 Where ctxt_idx is the index of the linked context id / vmid
171 comparator.
172
173 ----
174
175 :File: ``addr_ctxtype`` (rw)
176 :Trace Registers: ACATR[idx,{3:2}]
177 :Notes:
178 Input value string. Set type for linked context ID comparator
179
180 :Depends: ``addr_idx``
181 :Syntax:
182 ``echo type > addr_ctxtype``
183
184 Type one of {all, vmid, ctxid, none}
185 :Example:
186 ``$> echo ctxid > addr_ctxtype``
187
188 ----
189
190 :File: ``addr_exlevel_s_ns`` (rw)
191 :Trace Registers: ACATR[idx,{14:8}]
192 :Notes:
193 Set the ELx secure and non-secure matching bits for the
194 selected address comparator
195
196 :Depends: ``addr_idx``
197 :Syntax:
198 ``echo val > addr_exlevel_s_ns``
199
200 val is a 7 bit value for exception levels to exclude. Input
201 value shifted to correct bits in register.
202 :Example:
203 ``$> echo 0x4F > addr_exlevel_s_ns``
204
205 ----
206
207 :File: ``addr_instdatatype`` (rw)
208 :Trace Registers: ACATR[idx,{1:0}]
209 :Notes:
210 Set the comparator address type for matching. Driver only
211 supports setting instruction address type.
212
213 :Depends: ``addr_idx``
214
215 ----
216
217 :File: ``addr_cmp_view`` (ro)
218 :Trace Registers: ACVR[idx, idx+1], ACATR[idx], VIIECTLR
219 :Notes:
220 Read the currently selected address comparator. If part of
221 address range then display both addresses.
222
223 :Depends: ``addr_idx``
224 :Syntax:
225 ``cat addr_cmp_view``
226 :Example:
227 ``$> cat addr_cmp_view``
228
229 ``addr_cmp[0] range 0x0 0xffffffffffffffff include ctrl(0x4b00)``
230
231 ----
232
233 :File: ``nr_addr_cmp`` (ro)
234 :Trace Registers: From IDR4
235 :Notes:
236 Number of address comparator pairs
237
238 ----
239
240 :File: ``sshot_idx`` (rw)
241 :Trace Registers: None
242 :Notes:
243 Select single shot register set.
244
245 ----
246
247 :File: ``sshot_ctrl`` (rw)
248 :Trace Registers: SSCCR[idx]
249 :Notes:
250 Access a single shot comparator control register.
251
252 :Depends: ``sshot_idx``
253 :Syntax:
254 ``echo val > sshot_ctrl``
255
256 Writes val into the selected control register.
257
258 ----
259
260 :File: ``sshot_status`` (ro)
261 :Trace Registers: SSCSR[idx]
262 :Notes:
263 Read a single shot comparator status register
264
265 :Depends: ``sshot_idx``
266 :Syntax:
267 ``cat sshot_status``
268
269 Read status.
270 :Example:
271 ``$> cat sshot_status``
272
273 ``0x1``
274
275 ----
276
277 :File: ``sshot_pe_ctrl`` (rw)
278 :Trace Registers: SSPCICR[idx]
279 :Notes:
280 Access a single shot PE comparator input control register.
281
282 :Depends: ``sshot_idx``
283 :Syntax:
284 ``echo val > sshot_pe_ctrl``
285
286 Writes val into the selected control register.
287
288 ----
289
290 :File: ``ns_exlevel_vinst`` (rw)
291 :Trace Registers: VICTLR{23:20}
292 :Notes:
293 Program non-secure exception level filters. Set / clear NS
294 exception filter bits. Setting ‘1’ excludes trace from the
295 exception level.
296
297 :Syntax:
298 ``echo bitfield > ns_exlevel_viinst``
299
300 Where bitfield contains bits to set clear for EL0 to EL2
301 :Example:
302 ``%> echo 0x4 > ns_exlevel_viinst``
303
304 Excludes EL2 NS trace.
305
306 ----
307
308 :File: ``vinst_pe_cmp_start_stop`` (rw)
309 :Trace Registers: VIPCSSCTLR
310 :Notes:
311 Access PE start stop comparator input control registers
312
313 ----
314
315 :File: ``bb_ctrl`` (rw)
316 :Trace Registers: BBCTLR
317 :Notes:
318 Define ranges that Branch Broadcast will operate in.
319 Default (0x0) is all addresses.
320
321 :Depends: BB enabled.
322
323 ----
324
325 :File: ``cyc_threshold`` (rw)
326 :Trace Registers: CCCTLR
327 :Notes:
328 Set the threshold for which cycle counts will be emitted.
329 Error if attempt to set below minimum defined in IDR3, masked
330 to width of valid bits.
331
332 :Depends: CC enabled.
333
334 ----
335
336 :File: ``syncfreq`` (rw)
337 :Trace Registers: SYNCPR
338 :Notes:
339 Set trace synchronisation period. Power of 2 value, 0 (off)
340 or 8-20. Driver defaults to 12 (every 4096 bytes).
341
342 ----
343
344 :File: ``cntr_idx`` (rw)
345 :Trace Registers: none
346 :Notes:
347 Select the counter to access
348
349 :Syntax:
350 ``echo idx > cntr_idx``
351
352 Where idx < nr_cntr
353
354 ----
355
356 :File: ``cntr_ctrl`` (rw)
357 :Trace Registers: CNTCTLR[idx]
358 :Notes:
359 Set counter control value.
360
361 :Depends: ``cntr_idx``
362 :Syntax:
363 ``echo val > cntr_ctrl``
364
365 Where val is per ETMv4 spec.
366
367 ----
368
369 :File: ``cntrldvr`` (rw)
370 :Trace Registers: CNTRLDVR[idx]
371 :Notes:
372 Set counter reload value.
373
374 :Depends: ``cntr_idx``
375 :Syntax:
376 ``echo val > cntrldvr``
377
378 Where val is per ETMv4 spec.
379
380 ----
381
382 :File: ``nr_cntr`` (ro)
383 :Trace Registers: From IDR5
384
385 :Notes:
386 Number of counters implemented.
387
388 ----
389
390 :File: ``ctxid_idx`` (rw)
391 :Trace Registers: None
392 :Notes:
393 Select the context ID comparator to access
394
395 :Syntax:
396 ``echo idx > ctxid_idx``
397
398 Where idx < numcidc
399
400 ----
401
402 :File: ``ctxid_pid`` (rw)
403 :Trace Registers: CIDCVR[idx]
404 :Notes:
405 Set the context ID comparator value
406
407 :Depends: ``ctxid_idx``
408
409 ----
410
411 :File: ``ctxid_masks`` (rw)
412 :Trace Registers: CIDCCTLR0, CIDCCTLR1, CIDCVR<0-7>
413 :Notes:
414 Pair of values to set the byte masks for 1-8 context ID
415 comparators. Automatically clears masked bytes to 0 in CID
416 value registers.
417
418 :Syntax:
419 ``echo m3m2m1m0 [m7m6m5m4] > ctxid_masks``
420
421 32 bit values made up of mask bytes, where mN represents a
422 byte mask value for Context ID comparator N.
423
424 Second value not required on systems that have fewer than 4
425 context ID comparators
426
427 ----
428
429 :File: ``numcidc`` (ro)
430 :Trace Registers: From IDR4
431 :Notes:
432 Number of Context ID comparators
433
434 ----
435
436 :File: ``vmid_idx`` (rw)
437 :Trace Registers: None
438 :Notes:
439 Select the VM ID comparator to access.
440
441 :Syntax:
442 ``echo idx > vmid_idx``
443
444 Where idx < numvmidc
445
446 ----
447
448 :File: ``vmid_val`` (rw)
449 :Trace Registers: VMIDCVR[idx]
450 :Notes:
451 Set the VM ID comparator value
452
453 :Depends: ``vmid_idx``
454
455 ----
456
457 :File: ``vmid_masks`` (rw)
458 :Trace Registers: VMIDCCTLR0, VMIDCCTLR1, VMIDCVR<0-7>
459 :Notes:
460 Pair of values to set the byte masks for 1-8 VM ID comparators.
461 Automatically clears masked bytes to 0 in VMID value registers.
462
463 :Syntax:
464 ``echo m3m2m1m0 [m7m6m5m4] > vmid_masks``
465
466 Where mN represents a byte mask value for VMID comparator N.
467 Second value not required on systems that have fewer than 4
468 VMID comparators.
469
470 ----
471
472 :File: ``numvmidc`` (ro)
473 :Trace Registers: From IDR4
474 :Notes:
475 Number of VMID comparators
476
477 ----
478
479 :File: ``res_idx`` (rw)
480 :Trace Registers: None.
481 :Notes:
482 Select the resource selector control to access. Must be 2 or
483 higher as selectors 0 and 1 are hardwired.
484
485 :Syntax:
486 ``echo idx > res_idx``
487
488 Where 2 <= idx < nr_resource x 2
489
490 ----
491
492 :File: ``res_ctrl`` (rw)
493 :Trace Registers: RSCTLR[idx]
494 :Notes:
495 Set resource selector control value. Value per ETMv4 spec.
496
497 :Depends: ``res_idx``
498 :Syntax:
499 ``echo val > res_cntr``
500
501 Where val is per ETMv4 spec.
502
503 ----
504
505 :File: ``nr_resource`` (ro)
506 :Trace Registers: From IDR4
507 :Notes:
508 Number of resource selector pairs
509
510 ----
511
512 :File: ``event`` (rw)
513 :Trace Registers: EVENTCTRL0R
514 :Notes:
515 Set up to 4 implemented event fields.
516
517 :Syntax:
518 ``echo ev3ev2ev1ev0 > event``
519
520 Where evN is an 8 bit event field. Up to 4 event fields make up the
521 32-bit input value. Number of valid fields is implementation dependent,
522 defined in IDR0.
523
524 ----
525
526 :File: ``event_instren`` (rw)
527 :Trace Registers: EVENTCTRL1R
528 :Notes:
529 Choose events which insert event packets into trace stream.
530
531 :Depends: EVENTCTRL0R
532 :Syntax:
533 ``echo bitfield > event_instren``
534
535 Where bitfield is up to 4 bits according to number of event fields.
536
537 ----
538
539 :File: ``event_ts`` (rw)
540 :Trace Registers: TSCTLR
541 :Notes:
542 Set the event that will generate timestamp requests.
543
544 :Depends: ``TS activated``
545 :Syntax:
546 ``echo evfield > event_ts``
547
548 Where evfield is an 8 bit event selector.
549
550 ----
551
552 :File: ``seq_idx`` (rw)
553 :Trace Registers: None
554 :Notes:
555 Sequencer event register select - 0 to 2
556
557 ----
558
559 :File: ``seq_state`` (rw)
560 :Trace Registers: SEQSTR
561 :Notes:
562 Sequencer current state - 0 to 3.
563
564 ----
565
566 :File: ``seq_event`` (rw)
567 :Trace Registers: SEQEVR[idx]
568 :Notes:
569 State transition event registers
570
571 :Depends: ``seq_idx``
572 :Syntax:
573 ``echo evBevF > seq_event``
574
575 Where evBevF is a 16 bit value made up of two event selectors,
576
577 - evB : back
578 - evF : forwards.
579
580 ----
581
582 :File: ``seq_reset_event`` (rw)
583 :Trace Registers: SEQRSTEVR
584 :Notes:
585 Sequencer reset event
586
587 :Syntax:
588 ``echo evfield > seq_reset_event``
589
590 Where evfield is an 8 bit event selector.
591
592 ----
593
594 :File: ``nrseqstate`` (ro)
595 :Trace Registers: From IDR5
596 :Notes:
597 Number of sequencer states (0 or 4)
598
599 ----
600
601 :File: ``nr_pe_cmp`` (ro)
602 :Trace Registers: From IDR4
603 :Notes:
604 Number of PE comparator inputs
605
606 ----
607
608 :File: ``nr_ext_inp`` (ro)
609 :Trace Registers: From IDR5
610 :Notes:
611 Number of external inputs
612
613 ----
614
615 :File: ``nr_ss_cmp`` (ro)
616 :Trace Registers: From IDR4
617 :Notes:
618 Number of Single Shot control registers
619
620 ----
621
622 *Note:* When programming any address comparator the driver will tag the
623 comparator with a type used - i.e. RANGE, SINGLE, START, STOP. Once this tag
624 is set, then only the values can be changed using the same sysfs file / type
625 used to program it.
626
627 Thus::
628
629 % echo 0 > addr_idx ; select address comparator 0
630 % echo 0x1000 0x5000 0 > addr_range ; set address range on comparators 0, 1.
631 % echo 0x2000 > addr_start ; error as comparator 0 is a range comparator
632 % echo 2 > addr_idx ; select address comparator 2
633 % echo 0x2000 > addr_start ; this is OK as comparator 2 is unused.
634 % echo 0x3000 > addr_stop ; error as comparator 2 set as start address.
635 % echo 2 > addr_idx ; select address comparator 3
636 % echo 0x3000 > addr_stop ; this is OK
637
638 To remove programming on all the comparators (and all the other hardware) use
639 the reset parameter::
640
641 % echo 1 > reset
642
643
644
645 The ‘mode’ sysfs parameter.
646 ---------------------------
647
648 This is a bitfield selection parameter that sets the overall trace mode for the
649 ETM. The table below describes the bits, using the defines from the driver
650 source file, along with a description of the feature these represent. Many
651 features are optional and therefore dependent on implementation in the
652 hardware.
653
654 Bit assignments shown below:-
655
656 ----
657
658 **bit (0):**
659 ETM_MODE_EXCLUDE
660
661 **description:**
662 This is the default value for the include / exclude function when
663 setting address ranges. Set 1 for exclude range. When the mode
664 parameter is set this value is applied to the currently indexed
665 address range.
666
667 .. _coresight-branch-broadcast:
668
669 **bit (4):**
670 ETM_MODE_BB
671
672 **description:**
673 Set to enable branch broadcast if supported in hardware [IDR0]. The primary use for this feature
674 is when code is patched dynamically at run time and the full program flow may not be able to be
675 reconstructed using only conditional branches.
676
677 There is currently no support in Perf for supplying modified binaries to the decoder, so this
678 feature is only intended to be used for debugging purposes or with a 3rd party tool.
679
680 Choosing this option will result in a significant increase in the amount of trace generated -
681 possible danger of overflows, or fewer instructions covered. Note, that this option also
682 overrides any setting of :ref:`ETM_MODE_RETURNSTACK <coresight-return-stack>`, so where a branch
683 broadcast range overlaps a return stack range, return stacks will not be available for that
684 range.
685
686 .. _coresight-cycle-accurate:
687
688 **bit (5):**
689 ETMv4_MODE_CYCACC
690
691 **description:**
692 Set to enable cycle accurate trace if supported [IDR0].
693
694
695 **bit (6):**
696 ETMv4_MODE_CTXID
697
698 **description:**
699 Set to enable context ID tracing if supported in hardware [IDR2].
700
701
702 **bit (7):**
703 ETM_MODE_VMID
704
705 **description:**
706 Set to enable virtual machine ID tracing if supported [IDR2].
707
708 .. _coresight-timestamp:
709
710 **bit (11):**
711 ETMv4_MODE_TIMESTAMP
712
713 **description:**
714 Set to enable timestamp generation if supported [IDR0].
715
716 .. _coresight-return-stack:
717
718 **bit (12):**
719 ETM_MODE_RETURNSTACK
720 **description:**
721 Set to enable trace return stack use if supported [IDR0].
722
723
724 **bit (13-14):**
725 ETM_MODE_QELEM(val)
726
727 **description:**
728 ‘val’ determines level of Q element support enabled if
729 implemented by the ETM [IDR0]
730
731
732 **bit (19):**
733 ETM_MODE_ATB_TRIGGER
734
735 **description:**
736 Set to enable the ATBTRIGGER bit in the event control register
737 [EVENTCTLR1] if supported [IDR5].
738
739
740 **bit (20):**
741 ETM_MODE_LPOVERRIDE
742
743 **description:**
744 Set to enable the LPOVERRIDE bit in the event control register
745 [EVENTCTLR1], if supported [IDR5].
746
747
748 **bit (21):**
749 ETM_MODE_ISTALL_EN
750
751 **description:**
752 Set to enable the ISTALL bit in the stall control register
753 [STALLCTLR]
754
755
756 **bit (23):**
757 ETM_MODE_INSTPRIO
758
759 **description:**
760 Set to enable the INSTPRIORITY bit in the stall control register
761 [STALLCTLR] , if supported [IDR0].
762
763
764 **bit (24):**
765 ETM_MODE_NOOVERFLOW
766
767 **description:**
768 Set to enable the NOOVERFLOW bit in the stall control register
769 [STALLCTLR], if supported [IDR3].
770
771
772 **bit (25):**
773 ETM_MODE_TRACE_RESET
774
775 **description:**
776 Set to enable the TRCRESET bit in the viewinst control register
777 [VICTLR] , if supported [IDR3].
778
779
780 **bit (26):**
781 ETM_MODE_TRACE_ERR
782
783 **description:**
784 Set to enable the TRCCTRL bit in the viewinst control register
785 [VICTLR].
786
787
788 **bit (27):**
789 ETM_MODE_VIEWINST_STARTSTOP
790
791 **description:**
792 Set the initial state value of the ViewInst start / stop logic
793 in the viewinst control register [VICTLR]
794
795
796 **bit (30):**
797 ETM_MODE_EXCL_KERN
798
799 **description:**
800 Set default trace setup to exclude kernel mode trace (see note a)
801
802
803 **bit (31):**
804 ETM_MODE_EXCL_USER
805
806 **description:**
807 Set default trace setup to exclude user space trace (see note a)
808
809 ----
810
811 *Note a)* On startup the ETM is programmed to trace the complete address space
812 using address range comparator 0. ‘mode’ bits 30 / 31 modify this setting to
813 set EL exclude bits for NS state in either user space (EL0) or kernel space
814 (EL1) in the address range comparator. (the default setting excludes all
815 secure EL, and NS EL2)
816
817 Once the reset parameter has been used, and/or custom programming has been
818 implemented - using these bits will result in the EL bits for address
819 comparator 0 being set in the same way.
820
821 *Note b)* Bits 2-3, 8-10, 15-16, 18, 22, control features that only work with
822 data trace. As A-profile data trace is architecturally prohibited in ETMv4,
823 these have been omitted here. Possible uses could be where a kernel has
824 support for control of R or M profile infrastructure as part of a heterogeneous
825 system.
826
827 Bits 17, 28-29 are unused.
828

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

기본 trace 제어와 장치 식별

1-87

이 문서는 Mike Leach가 2019년 10월 11일에 작성한 ETMv4 sysfs Linux driver programming reference이며, 기존 ETMv4 driver 문서를 보충한다.

모든 항목의 root는 `/sys/bus/coresight/devices/etm<N>`이다. 아래 설명은 sysfs file과 그 file이 변경하는 ETMv4 register의 연계를 다룬다. register 이름은 `TRC` prefix를 생략해 적는다.

`mode`는 read/write file이며 `CONFIGR`와 그 밖의 register를 제어한다. 최대 32-bit bitfield를 써서 trace feature를 선택하며, 설정된 bit에 따라 trace configuration과 관련 register가 같은 기능을 enable하도록 programming된다. 예제는 `echo 0x012 > mode`다.

`reset`은 write-only file로 모든 trace register의 programming을 지워 trace 대상과 logic 설정이 없는 상태로 되돌린다. `echo 1 > reset`으로 실행한다.

`enable_source`는 write-only file이며 `PRGCTLR`와 모든 hardware register에 영향을 준다. 0보다 큰 값을 쓰면 driver가 보관한 현재 값으로 hardware를 programming한 뒤 trace를 enable하고, 0을 쓰면 trace hardware를 disable한다. enable 구문은 `echo 1 > enable_source`다.

`cpu`는 register를 변경하지 않는 read-only file이며 이 ETM이 연결된 CPU ID를 반환한다. 예제에서 `cat cpu`의 결과는 0이다.

`ts_source`도 register를 변경하지 않는 read-only file이다. `FEAT_TRF`가 구현되어 있으면 trace session에 사용하는 `TRFCR_ELx.TS` 값을 반환한다. 그렇지 않으면 -1이 unknown time source를 뜻한다. global timestamp 사용 가능 여부는 `trcidr0.tssize`로 확인하며, 원문 예제 값은 1이다.

기본 sysfs file
File접근Register기능
moderwCONFIGR + others최대 32-bit feature bitfield
resetwoAll모든 programming 초기화
enable_sourcewoPRGCTLR + all hardware현재 driver 값 적용 후 trace enable/disable
cpuroNone연결된 CPU ID
ts_sourceroNoneTRFCR_ELx.TS 또는 unknown(-1)

trace mode 설정, 전체 초기화, hardware enable과 식별 정보를 구분한다.

기본 명령
목적명령
mode 설정echo bitfield > mode
전체 resetecho 1 > reset
trace enableecho 1 > enable_source
CPU 확인cat cpu
timestamp source 확인cat ts_source

원문에 제시된 입력과 조회 형식이다.

ETM enable 흐름
sysfs 설정값 준비Driver-held ETMv4 values
echo 1 > enable_sourceProgram hardware registers
PRGCTLR enableTrace active

driver에 저장한 설정을 hardware에 적용한 뒤 trace를 시작한다.

===============================================
ETMv4 sysfs linux driver programming reference.
===============================================

    :Author:   Mike Leach <mike.leach@linaro.org>
    :Date:     October 11th, 2019

Supplement to existing ETMv4 driver documentation.

Sysfs files and directories
---------------------------

Root: ``/sys/bus/coresight/devices/etm<N>``


The following paragraphs explain the association between sysfs files and the
ETMv4 registers that they effect. Note the register names are given without
the ‘TRC’ prefix.

----

:File:            ``mode`` (rw)
:Trace Registers: {CONFIGR + others}
:Notes:
    Bit select trace features. See ‘mode’ section below. Bits
    in this will cause equivalent programming of trace config and
    other registers to enable the features requested.

:Syntax & eg:
    ``echo bitfield > mode``

    bitfield up to 32 bits setting trace features.

:Example:
    ``$> echo 0x012 > mode``

----

:File:            ``reset`` (wo)
:Trace Registers: All
:Notes:
    Reset all programming to trace nothing / no logic programmed.

:Syntax:
    ``echo 1 > reset``

----

:File:            ``enable_source`` (wo)
:Trace Registers: PRGCTLR, All hardware regs.
:Notes:
    - > 0 : Programs up the hardware with the current values held in the driver
      and enables trace.

    - = 0 : disable trace hardware.

:Syntax:
    ``echo 1 > enable_source``

----

:File:            ``cpu`` (ro)
:Trace Registers: None.
:Notes:
    CPU ID that this ETM is attached to.

:Example:
    ``$> cat cpu``

    ``$> 0``

----

:File:            ``ts_source`` (ro)
:Trace Registers: None.
:Notes:
    When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for trace session. Otherwise -1
    indicates an unknown time source. Check trcidr0.tssize to see if a global timestamp is
    available.

:Example:
    ``$> cat ts_source``

    ``$> 1``

----

Address comparator와 range 설정

88-239

`addr_idx`는 hardware register가 없는 가상 read/write selector다. address comparator와 range feature가 사용할 index를 선택하며, range일 때는 pair의 첫 comparator index를 지정한다. `echo idx > addr_idx` 형식이고 `idx < nr_addr_cmp x 2`여야 한다.

`addr_range`는 선택한 pair의 `ACVR[idx]`, `ACVR[idx+1]`과 `VIIECTLR`를 programming한다. `echo addr1 addr2 [exclude] > addr_range`를 사용하고 `addr1 < addr2`여야 한다. 선택적 `exclude`가 0이면 include, 1이면 exclude이며 생략하면 현재 `mode` 설정을 쓴다. control register에서도 해당 comparator range를 선택하며, `addr_idx`가 홀수이면 오류다.

`addr_single`은 `ACVR[idx]`에 단일 address comparator를 설정한다. 이 형식은 comparator를 event generation logic 등에 사용할 때 쓰며 `echo addr1 > addr_single`으로 입력한다.

`addr_start`와 `addr_stop`은 각각 `ACVR[idx]`와 `VISSCTLR`를 사용해 trace start 또는 trace stop address comparator를 설정하고 control register에서 해당 comparator를 선택한다. 두 file 모두 먼저 `addr_idx`를 지정해야 하며 각각 `echo addr1 > addr_start`, `echo addr1 > addr_stop` 형식이다.

`addr_context`는 `ACATR[idx,{6:4}]`를 변경해 context ID/VMID comparator를 현재 address comparator에 연결한다. `echo ctxt_idx > addr_context`에서 `ctxt_idx`는 연결할 context ID 또는 VMID comparator의 index다.

`addr_ctxtype`은 `ACATR[idx,{3:2}]`에 연결된 context ID comparator의 유형을 문자열로 지정한다. 허용 값은 `all`, `vmid`, `ctxid`, `none`이며 예제는 `echo ctxid > addr_ctxtype`다.

`addr_exlevel_s_ns`는 `ACATR[idx,{14:8}]`에 선택한 address comparator의 secure/non-secure EL matching bit를 설정한다. 입력은 제외할 exception level을 나타내는 7-bit 값이며 driver가 register의 올바른 bit 위치로 shift한다. 예제는 `echo 0x4F > addr_exlevel_s_ns`다.

`addr_instdatatype`은 `ACATR[idx,{1:0}]`의 comparator address matching type을 설정한다. driver는 instruction address type 설정만 지원하며 먼저 `addr_idx`를 선택해야 한다.

`addr_cmp_view`는 선택된 comparator를 읽는 read-only file이다. `ACVR` pair, `ACATR`, `VIIECTLR` 상태를 반영하며 range의 일부이면 두 address를 모두 표시한다. 예제 출력 `addr_cmp[0] range 0x0 0xffffffffffffffff include ctrl(0x4b00)`은 comparator 0 range와 include control을 보여 준다.

`nr_addr_cmp`는 IDR4에서 얻은 address comparator pair 수를 보여 주는 read-only file이다.

Address comparator file
FileRegister입력 또는 결과
addr_idxNoneidx < nr_addr_cmp x 2
addr_rangeACVR pair, VIIECTLRaddr1 addr2 [exclude]
addr_singleACVR[idx]single address
addr_startACVR[idx], VISSCTLRtrace start address
addr_stopACVR[idx], VISSCTLRtrace stop address
addr_contextACATR {6:4}linked context/VMID comparator index
addr_ctxtypeACATR {3:2}all, vmid, ctxid, none
addr_exlevel_s_nsACATR {14:8}7-bit EL exclude value
addr_instdatatypeACATR {1:0}instruction address type only
addr_cmp_viewACVR, ACATR, VIIECTLR현재 comparator 조회
nr_addr_cmpIDR4구현된 pair 수

index 선택 뒤 comparator의 용도와 연계 조건을 programming한다.

Range include/exclude
exclude 인수동작
0range include
1range exclude
생략현재 mode의 include/exclude 기본값
홀수 addr_idxrange 설정 오류

선택 인수와 mode 기본값의 관계다.

Address range programming
Select addr_idxProgram ACVR range pair
Set include/excludeSelect VIIECTLR range
Optional context/typeProgram ACATR
Optional EL filterComparator ready

pair 첫 index를 선택하고 범위와 EL/context 조건을 결합한다.

:File:            ``addr_idx`` (rw)
:Trace Registers: None.
:Notes:
    Virtual register to index address comparator and range
    features. Set index for first of the pair in a range.

:Syntax:
    ``echo idx > addr_idx``

    Where idx < nr_addr_cmp x 2

----

:File:            ``addr_range`` (rw)
:Trace Registers: ACVR[idx, idx+1], VIIECTLR
:Notes:
    Pair of addresses for a range selected by addr_idx. Include
    / exclude according to the optional parameter, or if omitted
    uses the current ‘mode’ setting. Select comparator range in
    control register. Error if index is odd value.

:Depends: ``mode, addr_idx``
:Syntax:
   ``echo addr1 addr2 [exclude] > addr_range``

   Where addr1 and addr2 define the range and addr1 < addr2.

   Optional exclude value:-

   - 0 for include
   - 1 for exclude.
:Example:
   ``$> echo 0x0000 0x2000 0 > addr_range``

----

:File:            ``addr_single`` (rw)
:Trace Registers: ACVR[idx]
:Notes:
    Set a single address comparator according to addr_idx. This
    is used if the address comparator is used as part of event
    generation logic etc.

:Depends: ``addr_idx``
:Syntax:
   ``echo addr1 > addr_single``

----

:File:           ``addr_start`` (rw)
:Trace Registers: ACVR[idx], VISSCTLR
:Notes:
    Set a trace start address comparator according to addr_idx.
    Select comparator in control register.

:Depends: ``addr_idx``
:Syntax:
    ``echo addr1 > addr_start``

----

:File:            ``addr_stop`` (rw)
:Trace Registers: ACVR[idx], VISSCTLR
:Notes:
    Set a trace stop address comparator according to addr_idx.
    Select comparator in control register.

:Depends: ``addr_idx``
:Syntax:
    ``echo addr1 > addr_stop``

----

:File:            ``addr_context`` (rw)
:Trace Registers: ACATR[idx,{6:4}]
:Notes:
    Link context ID comparator to address comparator addr_idx

:Depends: ``addr_idx``
:Syntax:
    ``echo ctxt_idx > addr_context``

    Where ctxt_idx is the index of the linked context id / vmid
    comparator.

----

:File:            ``addr_ctxtype`` (rw)
:Trace Registers: ACATR[idx,{3:2}]
:Notes:
    Input value string. Set type for linked context ID comparator

:Depends: ``addr_idx``
:Syntax:
    ``echo type > addr_ctxtype``

    Type one of {all, vmid, ctxid, none}
:Example:
    ``$> echo ctxid > addr_ctxtype``

----

:File:            ``addr_exlevel_s_ns`` (rw)
:Trace Registers: ACATR[idx,{14:8}]
:Notes:
    Set the ELx secure and non-secure matching bits for the
    selected address comparator

:Depends: ``addr_idx``
:Syntax:
    ``echo val > addr_exlevel_s_ns``

    val is a 7 bit value for exception levels to exclude. Input
    value shifted to correct bits in register.
:Example:
    ``$> echo 0x4F > addr_exlevel_s_ns``

----

:File:            ``addr_instdatatype`` (rw)
:Trace Registers: ACATR[idx,{1:0}]
:Notes:
    Set the comparator address type for matching. Driver only
    supports setting instruction address type.

:Depends: ``addr_idx``

----

:File:            ``addr_cmp_view`` (ro)
:Trace Registers: ACVR[idx, idx+1], ACATR[idx], VIIECTLR
:Notes:
    Read the currently selected address comparator. If part of
    address range then display both addresses.

:Depends: ``addr_idx``
:Syntax:
    ``cat addr_cmp_view``
:Example:
    ``$> cat addr_cmp_view``

   ``addr_cmp[0] range 0x0 0xffffffffffffffff include ctrl(0x4b00)``

----

:File:            ``nr_addr_cmp`` (ro)
:Trace Registers: From IDR4
:Notes:
    Number of address comparator pairs

----

Single-shot과 trace 품질 제어

240-343

`sshot_idx`는 hardware register 없이 접근할 single-shot register set을 고르는 read/write selector다.

`sshot_ctrl`은 선택된 `SSCCR[idx]` single-shot comparator control register에 값을 쓰며, `echo val > sshot_ctrl`을 사용한다. `sshot_status`는 선택된 `SSCSR[idx]` status register를 읽는 read-only file이고 예제 결과는 `0x1`이다. `sshot_pe_ctrl`은 선택된 `SSPCICR[idx]` PE comparator input control register에 값을 쓴다.

`ns_exlevel_vinst`는 `VICTLR{23:20}`의 non-secure exception level filter를 programming한다. 설정된 bit의 exception level은 trace에서 제외된다. bitfield는 EL0부터 EL2의 set/clear 상태를 담으며 원문 구문은 `echo bitfield > ns_exlevel_viinst`, 예제 `echo 0x4 > ns_exlevel_viinst`는 NS EL2 trace를 제외한다.

`vinst_pe_cmp_start_stop`은 `VIPCSSCTLR`의 PE start/stop comparator input control register에 접근한다.

`bb_ctrl`은 `BBCTLR`에 Branch Broadcast가 적용될 range를 정의한다. 기본값 `0x0`은 모든 address를 의미하며 Branch Broadcast가 enable되어 있어야 한다.

`cyc_threshold`는 `CCCTLR`에 cycle count packet을 방출할 threshold를 설정한다. IDR3가 정의한 최소값보다 낮게 쓰면 오류가 나며, 값은 유효 bit width로 mask된다. Cycle Count가 enable되어 있어야 한다.

`syncfreq`는 `SYNCPR`에 trace synchronization period를 설정한다. 값은 power of 2이며 0은 off, 유효 지수 범위는 8-20이다. driver 기본값은 12로 매 4096 byte마다 synchronization한다.

Single-shot file
FileRegister동작
sshot_idxNonesingle-shot set 선택
sshot_ctrlSSCCR[idx]control value 쓰기
sshot_statusSSCSR[idx]status 읽기
sshot_pe_ctrlSSPCICR[idx]PE comparator input control 쓰기

sshot_idx로 register set을 선택한 뒤 control, status와 PE input을 다룬다.

Trace 제어 file
FileRegister제약
ns_exlevel_vinstVICTLR {23:20}set bit의 NS EL trace 제외
vinst_pe_cmp_start_stopVIPCSSCTLRPE start/stop input control
bb_ctrlBBCTLRBranch Broadcast enable 필요
cyc_thresholdCCCTLRIDR3 minimum 이상, CC enable 필요
syncfreqSYNCPR0 또는 power 8-20, default 12

exception filter, broadcast, cycle과 sync 품질을 설정한다.

Single-shot 접근
Select sshot_idxSSCCR control
Select sshot_idxSSCSR status
Select sshot_idxSSPCICR PE input control

index selector가 세 종류의 indexed register 접근 기준이 된다.

:File:            ``sshot_idx`` (rw)
:Trace Registers: None
:Notes:
    Select single shot register set.

----

:File:            ``sshot_ctrl`` (rw)
:Trace Registers: SSCCR[idx]
:Notes:
    Access a single shot comparator control register.

:Depends: ``sshot_idx``
:Syntax:
    ``echo val > sshot_ctrl``

    Writes val into the selected control register.

----

:File:            ``sshot_status`` (ro)
:Trace Registers: SSCSR[idx]
:Notes:
    Read a single shot comparator status register

:Depends: ``sshot_idx``
:Syntax:
    ``cat sshot_status``

    Read status.
:Example:
    ``$> cat sshot_status``

    ``0x1``

----

:File:            ``sshot_pe_ctrl`` (rw)
:Trace Registers: SSPCICR[idx]
:Notes:
    Access a single shot PE comparator input control register.

:Depends: ``sshot_idx``
:Syntax:
    ``echo val > sshot_pe_ctrl``

    Writes val into the selected control register.

----

:File:            ``ns_exlevel_vinst`` (rw)
:Trace Registers: VICTLR{23:20}
:Notes:
    Program non-secure exception level filters. Set / clear NS
    exception filter bits. Setting ‘1’ excludes trace from the
    exception level.

:Syntax:
    ``echo bitfield > ns_exlevel_viinst``

    Where bitfield contains bits to set clear for EL0 to EL2
:Example:
    ``%> echo 0x4 > ns_exlevel_viinst``

    Excludes EL2 NS trace.

----

:File:            ``vinst_pe_cmp_start_stop`` (rw)
:Trace Registers: VIPCSSCTLR
:Notes:
    Access PE start stop comparator input control registers

----

:File:            ``bb_ctrl`` (rw)
:Trace Registers: BBCTLR
:Notes:
    Define ranges that Branch Broadcast will operate in.
    Default (0x0) is all addresses.

:Depends: BB enabled.

----

:File:            ``cyc_threshold`` (rw)
:Trace Registers: CCCTLR
:Notes:
    Set the threshold for which cycle counts will be emitted.
    Error if attempt to set below minimum defined in IDR3, masked
    to width of valid bits.

:Depends: CC enabled.

----

:File:            ``syncfreq`` (rw)
:Trace Registers: SYNCPR
:Notes:
    Set trace synchronisation period. Power of 2 value, 0 (off)
    or 8-20. Driver defaults to 12 (every 4096 bytes).

----

Counter·Context ID·VMID·resource selector

344-511

`cntr_idx`는 접근할 counter를 선택하는 가상 selector이며 `echo idx > cntr_idx`에서 `idx < nr_cntr`여야 한다. `cntr_ctrl`은 선택한 `CNTCTLR[idx]`에 ETMv4 specification 형식의 control 값을 쓰고, `cntrldvr`은 `CNTRLDVR[idx]`에 reload 값을 쓴다. `nr_cntr`는 IDR5에서 구현된 counter 수를 읽는다.

`ctxid_idx`는 `idx < numcidc` 조건으로 context ID comparator를 선택한다. `ctxid_pid`는 선택한 `CIDCVR[idx]`에 context ID comparator 값을 설정한다.

`ctxid_masks`는 `CIDCCTLR0`, `CIDCCTLR1`, `CIDCVR<0-7>`에 1-8개 context ID comparator의 byte mask pair를 설정한다. 구문은 `echo m3m2m1m0 [m7m6m5m4] > ctxid_masks`이며 각 `mN`은 comparator N의 한 byte mask다. masked byte는 대응 CID value register에서 자동으로 0으로 clear된다. context ID comparator가 4개보다 적은 system에는 두 번째 값이 필요 없다. `numcidc`는 IDR4에서 comparator 수를 읽는다.

`vmid_idx`는 `idx < numvmidc` 조건으로 VM ID comparator를 선택하고, `vmid_val`은 선택한 `VMIDCVR[idx]`에 값을 쓴다.

`vmid_masks`는 `VMIDCCTLR0`, `VMIDCCTLR1`, `VMIDCVR<0-7>`에 1-8개 VM ID comparator의 byte mask pair를 설정한다. `echo m3m2m1m0 [m7m6m5m4] > vmid_masks`를 사용하고 각 `mN`은 comparator N의 byte mask다. masked byte는 VMID value register에서 자동으로 0이 된다. comparator가 4개보다 적으면 두 번째 값은 필요 없다. `numvmidc`는 IDR4에서 수를 읽는다.

`res_idx`는 resource selector control index를 고른다. selector 0과 1은 hardwired이므로 2 이상이어야 하며 `2 <= idx < nr_resource x 2` 조건을 만족해야 한다.

`res_ctrl`은 선택한 `RSCTLR[idx]`에 ETMv4 specification에 따른 resource selector control 값을 쓴다. 원문에 기록된 구문은 `echo val > res_cntr`이며, `nr_resource`는 IDR4에서 구현된 resource selector pair 수를 읽는다.

Counter file
FileRegister내용
cntr_idxNoneidx < nr_cntr
cntr_ctrlCNTCTLR[idx]counter control value
cntrldvrCNTRLDVR[idx]counter reload value
nr_cntrIDR5구현된 counter 수

indexed control과 reload value를 설정한다.

Context와 VMID comparator
영역IndexValueMasksCount
Context IDctxid_idxctxid_pid / CIDCVRctxid_masks / CIDCCTLRnumcidc / IDR4
VM IDvmid_idxvmid_val / VMIDCVRvmid_masks / VMIDCCTLRnumvmidc / IDR4

index, value, byte mask와 구현 수를 같은 구조로 제공한다.

Resource selector
FileRegister조건
res_idxNone2 <= idx < nr_resource x 2
res_ctrlRSCTLR[idx]ETMv4 specification value
nr_resourceIDR4resource selector pair 수

hardwired selector를 피해서 programmable pair를 선택한다.

Indexed register 공통 패턴
Select cntr_idxCNTCTLR / CNTRLDVR
Select ctxid_idxCIDCVR
Select vmid_idxVMIDCVR
Select res_idxRSCTLR

가상 index file을 먼저 쓰고 대응 value/control file을 조작한다.

:File:            ``cntr_idx`` (rw)
:Trace Registers: none
:Notes:
    Select the counter to access

:Syntax:
    ``echo idx > cntr_idx``

    Where idx < nr_cntr

----

:File:            ``cntr_ctrl`` (rw)
:Trace Registers: CNTCTLR[idx]
:Notes:
    Set counter control value.

:Depends: ``cntr_idx``
:Syntax:
    ``echo val > cntr_ctrl``

    Where val is per ETMv4 spec.

----

:File:            ``cntrldvr`` (rw)
:Trace Registers: CNTRLDVR[idx]
:Notes:
    Set counter reload value.

:Depends: ``cntr_idx``
:Syntax:
    ``echo val > cntrldvr``

    Where val is per ETMv4 spec.

----

:File:            ``nr_cntr`` (ro)
:Trace Registers: From IDR5

:Notes:
    Number of counters implemented.

----

:File:            ``ctxid_idx`` (rw)
:Trace Registers: None
:Notes:
    Select the context ID comparator to access

:Syntax:
    ``echo idx > ctxid_idx``

    Where idx < numcidc

----

:File:            ``ctxid_pid`` (rw)
:Trace Registers: CIDCVR[idx]
:Notes:
   Set the context ID comparator value

:Depends: ``ctxid_idx``

----

:File: ``ctxid_masks`` (rw)
:Trace Registers: CIDCCTLR0, CIDCCTLR1, CIDCVR<0-7>
:Notes:
    Pair of values to set the byte masks for 1-8 context ID
    comparators. Automatically clears masked bytes to 0 in CID
    value registers.

:Syntax:
    ``echo m3m2m1m0 [m7m6m5m4] > ctxid_masks``

    32 bit values made up of mask bytes, where mN represents a
    byte mask value for Context ID comparator N.

    Second value not required on systems that have fewer than 4
    context ID comparators

----

:File:            ``numcidc`` (ro)
:Trace Registers: From IDR4
:Notes:
    Number of Context ID comparators

----

:File:            ``vmid_idx`` (rw)
:Trace Registers: None
:Notes:
    Select the VM ID comparator to access.

:Syntax:
    ``echo idx > vmid_idx``

    Where idx <  numvmidc

----

:File:            ``vmid_val`` (rw)
:Trace Registers: VMIDCVR[idx]
:Notes:
    Set the VM ID comparator value

:Depends: ``vmid_idx``

----

:File:            ``vmid_masks`` (rw)
:Trace Registers: VMIDCCTLR0, VMIDCCTLR1, VMIDCVR<0-7>
:Notes:
    Pair of values to set the byte masks for 1-8 VM ID comparators.
    Automatically clears masked bytes to 0 in VMID value registers.

:Syntax:
    ``echo m3m2m1m0 [m7m6m5m4] > vmid_masks``

    Where mN represents a byte mask value for VMID comparator N.
    Second value not required on systems that have fewer than 4
    VMID comparators.

----

:File:            ``numvmidc`` (ro)
:Trace Registers: From IDR4
:Notes:
    Number of VMID comparators

----

:File:            ``res_idx`` (rw)
:Trace Registers: None.
:Notes:
    Select the resource selector control to access. Must be 2 or
    higher as selectors 0 and 1 are hardwired.

:Syntax:
    ``echo idx > res_idx``

    Where 2 <= idx < nr_resource x 2

----

:File:            ``res_ctrl`` (rw)
:Trace Registers: RSCTLR[idx]
:Notes:
    Set resource selector control value. Value per ETMv4 spec.

:Depends: ``res_idx``
:Syntax:
    ``echo val > res_cntr``

    Where val is per ETMv4 spec.

----

:File:            ``nr_resource`` (ro)
:Trace Registers: From IDR4
:Notes:
    Number of resource selector pairs

----

Event packet과 sequencer 설정

512-621

`event`는 `EVENTCTRL0R`에 최대 네 개의 구현된 event field를 설정한다. `echo ev3ev2ev1ev0 > event` 형식이며 각 `evN`은 8-bit event field다. 최대 네 field가 32-bit 입력을 이루고, 실제 유효 field 수는 구현에 따라 달라 IDR0에 정의된다.

`event_instren`은 `EVENTCTRL1R`에서 trace stream에 event packet을 삽입할 event를 선택한다. `EVENTCTRL0R` 설정에 의존하며, event field 수에 따라 최대 4-bit bitfield를 `echo bitfield > event_instren`으로 쓴다.

`event_ts`는 `TSCTLR`에 timestamp request를 발생시킬 event를 설정한다. timestamp 기능이 활성화되어 있어야 하며 `echo evfield > event_ts`의 `evfield`는 8-bit event selector다.

`seq_idx`는 sequencer event register 0-2를 선택한다. `seq_state`는 `SEQSTR`의 현재 sequencer state를 0-3 범위로 설정하거나 읽는다.

`seq_event`는 선택한 `SEQEVR[idx]` state transition event register를 설정한다. `echo evBevF > seq_event`의 16-bit 값은 뒤로 전이하는 `evB`와 앞으로 전이하는 `evF`, 두 event selector로 구성된다.

`seq_reset_event`는 `SEQRSTEVR`의 sequencer reset event를 설정한다. `echo evfield > seq_reset_event`에서 `evfield`는 8-bit event selector다.

read-only capability file 중 `nrseqstate`는 IDR5에서 sequencer state 수 0 또는 4를, `nr_pe_cmp`는 IDR4에서 PE comparator input 수를, `nr_ext_inp`는 IDR5에서 external input 수를, `nr_ss_cmp`는 IDR4에서 Single Shot control register 수를 반환한다.

Event file
FileRegister
eventEVENTCTRL0R최대 4개의 8-bit event field
event_instrenEVENTCTRL1Revent packet 삽입 선택 bitfield
event_tsTSCTLRtimestamp request용 8-bit selector

event 정의와 trace packet 또는 timestamp 발생 대상을 분리한다.

Sequencer file
FileRegister범위 또는 형식
seq_idxNoneevent register 0-2
seq_stateSEQSTRstate 0-3
seq_eventSEQEVR[idx]16-bit evB + evF
seq_reset_eventSEQRSTEVR8-bit event selector

state와 전이 event, reset event를 설정한다.

구현 수 조회
FileSource결과
nrseqstateIDR5sequencer state 0 또는 4
nr_pe_cmpIDR4PE comparator input 수
nr_ext_inpIDR5external input 수
nr_ss_cmpIDR4Single Shot control register 수

ID register에서 선택 기능의 hardware 수량을 읽는다.

Event에서 trace 동작까지
EVENTCTRL0R event fieldsEVENTCTRL1R packet insertion
Event selectorTSCTLR timestamp request
Event selector pairSEQEVR state transition
Reset eventSEQRSTEVR

정의한 event를 packet 삽입, timestamp 또는 sequencer 전이에 연결한다.

:File:            ``event`` (rw)
:Trace Registers: EVENTCTRL0R
:Notes:
    Set up to 4 implemented event fields.

:Syntax:
    ``echo ev3ev2ev1ev0 > event``

    Where evN is an 8 bit event field. Up to 4 event fields make up the
    32-bit input value. Number of valid fields is implementation dependent,
    defined in IDR0.

----

:File: ``event_instren`` (rw)
:Trace Registers: EVENTCTRL1R
:Notes:
    Choose events which insert event packets into trace stream.

:Depends: EVENTCTRL0R
:Syntax:
    ``echo bitfield > event_instren``

    Where bitfield is up to 4 bits according to number of event fields.

----

:File:            ``event_ts`` (rw)
:Trace Registers: TSCTLR
:Notes:
    Set the event that will generate timestamp requests.

:Depends: ``TS activated``
:Syntax:
    ``echo evfield > event_ts``

    Where evfield is an 8 bit event selector.

----

:File:            ``seq_idx`` (rw)
:Trace Registers: None
:Notes:
    Sequencer event register select - 0 to 2

----

:File:            ``seq_state`` (rw)
:Trace Registers: SEQSTR
:Notes:
    Sequencer current state - 0 to 3.

----

:File:            ``seq_event`` (rw)
:Trace Registers: SEQEVR[idx]
:Notes:
    State transition event registers

:Depends: ``seq_idx``
:Syntax:
    ``echo evBevF > seq_event``

    Where evBevF is a 16 bit value made up of two event selectors,

    - evB : back
    - evF : forwards.

----

:File:            ``seq_reset_event`` (rw)
:Trace Registers: SEQRSTEVR
:Notes:
    Sequencer reset event

:Syntax:
    ``echo evfield > seq_reset_event``

    Where evfield is an 8 bit event selector.

----

:File:            ``nrseqstate`` (ro)
:Trace Registers: From IDR5
:Notes:
    Number of sequencer states (0 or 4)

----

:File:            ``nr_pe_cmp`` (ro)
:Trace Registers: From IDR4
:Notes:
    Number of PE comparator inputs

----

:File:            ``nr_ext_inp`` (ro)
:Trace Registers: From IDR5
:Notes:
    Number of external inputs

----

:File:            ``nr_ss_cmp`` (ro)
:Trace Registers: From IDR4
:Notes:
    Number of Single Shot control registers

----

Comparator type 고정과 reset

622-644

driver는 address comparator를 programming할 때 사용 유형을 `RANGE`, `SINGLE`, `START`, `STOP` 중 하나로 tag한다. 한 번 tag가 설정되면 같은 sysfs file과 같은 유형을 통해서만 comparator 값을 바꿀 수 있다.

예제에서 comparator 0을 선택한 뒤 `addr_range`로 comparator 0과 1에 `0x1000-0x5000` include range를 설정한다. 그 다음 같은 comparator 0을 `addr_start`로 바꾸려 하면 이미 range comparator이므로 오류가 난다.

comparator 2는 사용되지 않았으므로 `addr_start`로 `0x2000`을 설정할 수 있다. 이후 같은 comparator 2에 `addr_stop`을 쓰면 이미 start address로 tag되어 오류가 난다.

마지막 명령은 `addr_stop`을 허용되는 comparator에 설정하는 예를 보여 준다. 원문 설명은 comparator 3을 선택한다고 적지만 제시된 명령은 다시 `echo 2 > addr_idx`이며, 원문 명령과 설명은 변경하지 않고 그대로 보존한다.

모든 comparator와 그 밖의 hardware programming을 제거하려면 `echo 1 > reset`을 사용한다.

Comparator type 규칙
현재 tag같은 유형 갱신다른 유형 쓰기
RANGEaddr_range 허용single/start/stop 오류
SINGLEaddr_single 허용range/start/stop 오류
STARTaddr_start 허용range/single/stop 오류
STOPaddr_stop 허용range/single/start 오류

첫 programming 유형이 이후 허용되는 sysfs file을 결정한다.

예제의 comparator 상태
Comparator 0 unusedSet RANGE on pair 0-1
Try START on comparator 0Type conflict error
Comparator 2 unusedSet START
Try STOP on comparator 2Type conflict error
echo 1 > resetClear all type programming

사용되지 않은 comparator만 새 type을 받을 수 있다.

*Note:* When programming any address comparator the driver will tag the
comparator with a type used - i.e. RANGE, SINGLE, START, STOP. Once this tag
is set, then only the values can be changed using the same sysfs file / type
used to program it.

Thus::

  % echo 0 > addr_idx		; select address comparator 0
  % echo 0x1000 0x5000 0 > addr_range ; set address range on comparators 0, 1.
  % echo 0x2000 > addr_start    ; error as comparator 0 is a range comparator
  % echo 2 > addr_idx		; select address comparator 2
  % echo 0x2000 > addr_start	; this is OK as comparator 2 is unused.
  % echo 0x3000 > addr_stop	; error as comparator 2 set as start address.
  % echo 2 > addr_idx		; select address comparator 3
  % echo 0x3000 > addr_stop	; this is OK

To remove programming on all the comparators (and all the other hardware) use
the reset parameter::

  % echo 1 > reset


mode bit 0-11의 trace feature

645-717

`mode` sysfs parameter는 ETM의 전체 trace mode를 정하는 bitfield selector다. 각 bit는 driver source의 define과 대응하며, 많은 feature가 optional이므로 실제 동작 여부는 hardware 구현에 달려 있다.

bit 0 `ETM_MODE_EXCLUDE`는 address range 설정에서 include/exclude 기본값이다. 1이면 exclude range이며, mode를 쓸 때 이 값이 현재 index의 address range에 적용된다.

bit 4 `ETM_MODE_BB`는 IDR0가 지원할 때 Branch Broadcast를 enable한다. runtime에 code가 동적으로 patch되어 conditional branch만으로 전체 program flow를 재구성하기 어려울 때 주로 쓴다.

Perf는 decoder에 수정된 binary를 제공하는 기능을 현재 지원하지 않으므로 Branch Broadcast는 debugging 또는 third-party tool 용도다. 이 옵션은 trace 양을 크게 늘려 overflow 위험이나 기록되는 instruction 수 감소를 일으킬 수 있다.

Branch Broadcast는 `ETM_MODE_RETURNSTACK` 설정을 override한다. 따라서 Branch Broadcast range와 return stack range가 겹치면 그 range에서는 return stack을 사용할 수 없다.

bit 5 `ETMv4_MODE_CYCACC`는 IDR0가 지원할 때 cycle-accurate trace를 enable한다. bit 6 `ETMv4_MODE_CTXID`는 IDR2가 지원할 때 context ID tracing을, bit 7 `ETM_MODE_VMID`는 IDR2가 지원할 때 virtual machine ID tracing을 enable한다.

bit 11 `ETMv4_MODE_TIMESTAMP`는 IDR0가 지원할 때 timestamp generation을 enable한다.

mode 하위 bit
BitDefine기능Capability
0ETM_MODE_EXCLUDE현재 range의 exclude 기본값항상 설정 정책
4ETM_MODE_BBBranch BroadcastIDR0
5ETMv4_MODE_CYCACCcycle-accurate traceIDR0
6ETMv4_MODE_CTXIDcontext ID tracingIDR2
7ETM_MODE_VMIDVM ID tracingIDR2
11ETMv4_MODE_TIMESTAMPtimestamp generationIDR0

기본 range 정책과 주요 trace 식별·시간 기능을 선택한다.

Branch Broadcast tradeoff
Runtime code patchingEnable ETM_MODE_BB
Broadcast more branchesHigher trace volume
Higher trace volumeOverflow / fewer covered instructions
Overlap return-stack rangeReturn stack unavailable

동적 code flow 복원력을 얻는 대신 trace volume과 decoder 제약이 커진다.

The ‘mode’ sysfs parameter.
---------------------------

This is a bitfield selection parameter that sets the overall trace mode for the
ETM. The table below describes the bits, using the defines from the driver
source file, along with a description of the feature these represent. Many
features are optional and therefore dependent on implementation in the
hardware.

Bit assignments shown below:-

----

**bit (0):**
    ETM_MODE_EXCLUDE

**description:**
    This is the default value for the include / exclude function when
    setting address ranges. Set 1 for exclude range. When the mode
    parameter is set this value is applied to the currently indexed
    address range.

.. _coresight-branch-broadcast:

**bit (4):**
    ETM_MODE_BB

**description:**
    Set to enable branch broadcast if supported in hardware [IDR0]. The primary use for this feature
    is when code is patched dynamically at run time and the full program flow may not be able to be
    reconstructed using only conditional branches.

    There is currently no support in Perf for supplying modified binaries to the decoder, so this
    feature is only intended to be used for debugging purposes or with a 3rd party tool.

    Choosing this option will result in a significant increase in the amount of trace generated -
    possible danger of overflows, or fewer instructions covered. Note, that this option also
    overrides any setting of :ref:`ETM_MODE_RETURNSTACK <coresight-return-stack>`, so where a branch
    broadcast range overlaps a return stack range, return stacks will not be available for that
    range.

.. _coresight-cycle-accurate:

**bit (5):**
    ETMv4_MODE_CYCACC

**description:**
    Set to enable cycle accurate trace if supported [IDR0].


**bit (6):**
    ETMv4_MODE_CTXID

**description:**
    Set to enable context ID tracing if supported in hardware [IDR2].


**bit (7):**
    ETM_MODE_VMID

**description:**
    Set to enable virtual machine ID tracing if supported [IDR2].

.. _coresight-timestamp:

**bit (11):**
    ETMv4_MODE_TIMESTAMP

**description:**
    Set to enable timestamp generation if supported [IDR0].

.. _coresight-return-stack:

mode bit 12-31과 EL 제외 규칙

718-827

bit 12 `ETM_MODE_RETURNSTACK`은 IDR0가 지원할 때 trace return stack 사용을 enable한다. bit 13-14 `ETM_MODE_QELEM(val)`의 `val`은 ETM이 구현한 Q element support 중 enable할 level을 정하며 capability는 IDR0에 있다.

bit 19 `ETM_MODE_ATB_TRIGGER`는 IDR5가 지원할 때 `EVENTCTLR1`의 `ATBTRIGGER` bit를 enable한다. bit 20 `ETM_MODE_LPOVERRIDE`도 IDR5 지원 시 같은 register의 `LPOVERRIDE` bit를 enable한다.

bit 21 `ETM_MODE_ISTALL_EN`은 `STALLCTLR`의 `ISTALL` bit를 enable한다. bit 23 `ETM_MODE_INSTPRIO`는 IDR0가 지원할 때 `STALLCTLR`의 `INSTPRIORITY` bit를 enable한다. bit 24 `ETM_MODE_NOOVERFLOW`는 IDR3가 지원할 때 `STALLCTLR`의 `NOOVERFLOW` bit를 enable한다.

bit 25 `ETM_MODE_TRACE_RESET`은 IDR3가 지원할 때 `VICTLR`의 `TRCRESET` bit를 enable한다. bit 26 `ETM_MODE_TRACE_ERR`은 `VICTLR`의 `TRCCTRL` bit를 enable한다. bit 27 `ETM_MODE_VIEWINST_STARTSTOP`은 `VICTLR`에 ViewInst start/stop logic의 초기 state 값을 설정한다.

bit 30 `ETM_MODE_EXCL_KERN`은 기본 trace 설정에서 kernel mode trace를 제외하고, bit 31 `ETM_MODE_EXCL_USER`는 user-space trace를 제외한다.

startup 시 ETM은 address range comparator 0으로 전체 address space를 trace하도록 programming된다. mode bit 30과 31은 이 comparator의 non-secure state EL exclude bit를 수정해 각각 user space EL0 또는 kernel space EL1을 제외한다. 기본 설정은 모든 secure EL과 non-secure EL2를 제외한다.

`reset`을 사용했거나 custom programming을 적용한 뒤에도 bit 30 또는 31을 사용하면 address comparator 0의 EL bit가 같은 방식으로 설정된다.

bit 2-3, 8-10, 15-16, 18, 22는 data trace에서만 동작하는 feature를 제어한다. ETMv4에서 A-profile data trace는 architecture상 금지되어 이 문서에서 생략했다. 다만 heterogeneous system에서 kernel이 R-profile 또는 M-profile infrastructure 제어를 지원할 때 활용 가능성이 있다.

bit 17과 bit 28-29는 사용하지 않는다.

mode 상위 bit
BitDefine대상 / 기능
12ETM_MODE_RETURNSTACKtrace return stack, IDR0
13-14ETM_MODE_QELEM(val)Q element support level, IDR0
19ETM_MODE_ATB_TRIGGEREVENTCTLR1.ATBTRIGGER, IDR5
20ETM_MODE_LPOVERRIDEEVENTCTLR1.LPOVERRIDE, IDR5
21ETM_MODE_ISTALL_ENSTALLCTLR.ISTALL
23ETM_MODE_INSTPRIOSTALLCTLR.INSTPRIORITY, IDR0
24ETM_MODE_NOOVERFLOWSTALLCTLR.NOOVERFLOW, IDR3
25ETM_MODE_TRACE_RESETVICTLR.TRCRESET, IDR3
26ETM_MODE_TRACE_ERRVICTLR.TRCCTRL
27ETM_MODE_VIEWINST_STARTSTOPViewInst start/stop 초기 state
30ETM_MODE_EXCL_KERNNS EL1 kernel trace 제외
31ETM_MODE_EXCL_USERNS EL0 user trace 제외

return stack, event, stall, ViewInst와 privilege 제외 기능을 설정한다.

mode bit 분류
Bit상태이유 또는 용도
2-3, 8-10, 15-16, 18, 22문서에서 생략A-profile에서 금지된 data trace 전용
17, 28-29미사용할당된 기능 없음
30-31사용address comparator 0의 NS EL 제외

A-profile에서 생략되거나 사용하지 않는 bit를 명시한다.

기본 EL trace 범위
Address comparator 0Complete address space
Default EL filterExclude all secure EL + NS EL2
mode bit 30Also exclude NS EL1 kernel
mode bit 31Also exclude NS EL0 user

전체 address range에서 secure EL과 NS EL2를 기본 제외하고 mode bit로 EL0/EL1을 추가 제외한다.

**bit (12):**
    ETM_MODE_RETURNSTACK
**description:**
    Set to enable trace return stack use if supported [IDR0].


**bit (13-14):**
    ETM_MODE_QELEM(val)

**description:**
    ‘val’ determines level of Q element support enabled if
    implemented by the ETM [IDR0]


**bit (19):**
    ETM_MODE_ATB_TRIGGER

**description:**
    Set to enable the ATBTRIGGER bit in the event control register
    [EVENTCTLR1] if supported [IDR5].


**bit (20):**
    ETM_MODE_LPOVERRIDE

**description:**
    Set to enable the LPOVERRIDE bit in the event control register
    [EVENTCTLR1], if supported [IDR5].


**bit (21):**
    ETM_MODE_ISTALL_EN

**description:**
    Set to enable the ISTALL bit in the stall control register
    [STALLCTLR]


**bit (23):**
    ETM_MODE_INSTPRIO

**description:**
	      Set to enable the INSTPRIORITY bit in the stall control register
	      [STALLCTLR] , if supported [IDR0].


**bit (24):**
    ETM_MODE_NOOVERFLOW

**description:**
    Set to enable the NOOVERFLOW bit in the stall control register
    [STALLCTLR], if supported [IDR3].


**bit (25):**
    ETM_MODE_TRACE_RESET

**description:**
    Set to enable the TRCRESET bit in the viewinst control register
    [VICTLR] , if supported [IDR3].


**bit (26):**
    ETM_MODE_TRACE_ERR

**description:**
    Set to enable the TRCCTRL bit in the viewinst control register
    [VICTLR].


**bit (27):**
    ETM_MODE_VIEWINST_STARTSTOP

**description:**
    Set the initial state value of the ViewInst start / stop logic
    in the viewinst control register [VICTLR]


**bit (30):**
    ETM_MODE_EXCL_KERN

**description:**
    Set default trace setup to exclude kernel mode trace (see note a)


**bit (31):**
    ETM_MODE_EXCL_USER

**description:**
    Set default trace setup to exclude user space trace (see note a)

----

*Note a)* On startup the ETM is programmed to trace the complete address space
using address range comparator 0. ‘mode’ bits 30 / 31 modify this setting to
set EL exclude bits for NS state in either user space (EL0) or kernel space
(EL1) in the address range comparator. (the default setting excludes all
secure EL, and NS EL2)

Once the reset parameter has been used, and/or custom programming has been
implemented - using these bits will result in the EL bits for address
comparator 0 being set in the same way.

*Note b)* Bits 2-3, 8-10, 15-16, 18, 22, control features that only work with
data trace. As A-profile data trace is architecturally prohibited in ETMv4,
these have been omitted here. Possible uses could be where a kernel has
support for control of R or M profile infrastructure as part of a heterogeneous
system.

Bits 17, 28-29 are unused.