요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
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.. SPDX-License-Identifier: GPL-2.0
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====================================================================
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Notes on Oxford Semiconductor PCIe (Tornado) 950 serial port devices
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====================================================================
7
Oxford Semiconductor PCIe (Tornado) 950 serial port devices are driven
8
by a fixed 62.5MHz clock input derived from the 100MHz PCI Express clock.
10
The baud rate produced by the baud generator is obtained from this input
11
frequency by dividing it by the clock prescaler, which can be set to any
12
value from 1 to 63.875 in increments of 0.125, and then the usual 16-bit
13
divisor is used as with the original 8250, to divide the frequency by a
14
value from 1 to 65535. Finally a programmable oversampling rate is used
15
that can take any value from 4 to 16 to divide the frequency further and
16
determine the actual baud rate used. Baud rates from 15625000bps down
17
to 0.933bps can be obtained this way.
19
By default the oversampling rate is set to 16 and the clock prescaler is
20
set to 33.875, meaning that the frequency to be used as the reference
21
for the usual 16-bit divisor is 115313.653, which is close enough to the
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frequency of 115200 used by the original 8250 for the same values to be
23
used for the divisor to obtain the requested baud rates by software that
24
is unaware of the extra clock controls available.
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The oversampling rate is programmed with the TCR register and the clock
27
prescaler is programmed with the CPR/CPR2 register pair [OX200]_ [OX952]_
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[OX954]_ [OX958]_. To switch away from the default value of 33.875 for
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the prescaler the enhanced mode has to be explicitly enabled though, by
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setting bit 4 of the EFR. In that mode setting bit 7 in the MCR enables
31
the prescaler or otherwise it is bypassed as if the value of 1 was used.
32
Additionally writing any value to CPR clears CPR2 for compatibility with
33
old software written for older conventional PCI Oxford Semiconductor
34
devices that do not have the extra prescaler's 9th bit in CPR2, so the
35
CPR/CPR2 register pair has to be programmed in the right order.
37
By using these parameters rates from 15625000bps down to 1bps can be
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obtained, with either exact or highly-accurate actual bit rates for
39
standard and many non-standard rates.
41
Here are the figures for the standard and some non-standard baud rates
42
(including those quoted in Oxford Semiconductor documentation), giving
43
the requested rate (r), the actual rate yielded (a) and its deviation
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from the requested rate (d), and the values of the oversampling rate
45
(tcr), the clock prescaler (cpr) and the divisor (div) produced by the
46
new ``get_divisor`` handler:
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::
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r: 15625000, a: 15625000.00, d: 0.0000%, tcr: 4, cpr: 1.000, div: 1
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r: 12500000, a: 12500000.00, d: 0.0000%, tcr: 5, cpr: 1.000, div: 1
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r: 10416666, a: 10416666.67, d: 0.0000%, tcr: 6, cpr: 1.000, div: 1
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r: 8928571, a: 8928571.43, d: 0.0000%, tcr: 7, cpr: 1.000, div: 1
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r: 7812500, a: 7812500.00, d: 0.0000%, tcr: 8, cpr: 1.000, div: 1
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r: 4000000, a: 4000000.00, d: 0.0000%, tcr: 5, cpr: 3.125, div: 1
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r: 3686400, a: 3676470.59, d: -0.2694%, tcr: 8, cpr: 2.125, div: 1
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r: 3500000, a: 3496503.50, d: -0.0999%, tcr: 13, cpr: 1.375, div: 1
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r: 3000000, a: 2976190.48, d: -0.7937%, tcr: 14, cpr: 1.500, div: 1
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r: 2500000, a: 2500000.00, d: 0.0000%, tcr: 10, cpr: 2.500, div: 1
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r: 2000000, a: 2000000.00, d: 0.0000%, tcr: 10, cpr: 3.125, div: 1
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r: 1843200, a: 1838235.29, d: -0.2694%, tcr: 16, cpr: 2.125, div: 1
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r: 1500000, a: 1492537.31, d: -0.4975%, tcr: 5, cpr: 8.375, div: 1
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r: 1152000, a: 1152073.73, d: 0.0064%, tcr: 14, cpr: 3.875, div: 1
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r: 921600, a: 919117.65, d: -0.2694%, tcr: 16, cpr: 2.125, div: 2
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r: 576000, a: 576036.87, d: 0.0064%, tcr: 14, cpr: 3.875, div: 2
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r: 460800, a: 460829.49, d: 0.0064%, tcr: 7, cpr: 3.875, div: 5
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r: 230400, a: 230414.75, d: 0.0064%, tcr: 14, cpr: 3.875, div: 5
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r: 115200, a: 115207.37, d: 0.0064%, tcr: 14, cpr: 1.250, div: 31
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r: 57600, a: 57603.69, d: 0.0064%, tcr: 8, cpr: 3.875, div: 35
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r: 38400, a: 38402.46, d: 0.0064%, tcr: 14, cpr: 3.875, div: 30
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r: 19200, a: 19201.23, d: 0.0064%, tcr: 8, cpr: 3.875, div: 105
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r: 9600, a: 9600.06, d: 0.0006%, tcr: 9, cpr: 1.125, div: 643
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r: 4800, a: 4799.98, d: -0.0004%, tcr: 7, cpr: 2.875, div: 647
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r: 2400, a: 2400.02, d: 0.0008%, tcr: 9, cpr: 2.250, div: 1286
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r: 1200, a: 1200.00, d: 0.0000%, tcr: 14, cpr: 2.875, div: 1294
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r: 300, a: 300.00, d: 0.0000%, tcr: 11, cpr: 2.625, div: 7215
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r: 200, a: 200.00, d: 0.0000%, tcr: 16, cpr: 1.250, div: 15625
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r: 150, a: 150.00, d: 0.0000%, tcr: 13, cpr: 2.250, div: 14245
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r: 134, a: 134.00, d: 0.0000%, tcr: 11, cpr: 2.625, div: 16153
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r: 110, a: 110.00, d: 0.0000%, tcr: 12, cpr: 1.000, div: 47348
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r: 75, a: 75.00, d: 0.0000%, tcr: 4, cpr: 5.875, div: 35461
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r: 50, a: 50.00, d: 0.0000%, tcr: 16, cpr: 1.250, div: 62500
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r: 25, a: 25.00, d: 0.0000%, tcr: 16, cpr: 2.500, div: 62500
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r: 4, a: 4.00, d: 0.0000%, tcr: 16, cpr: 20.000, div: 48828
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r: 2, a: 2.00, d: 0.0000%, tcr: 16, cpr: 40.000, div: 48828
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r: 1, a: 1.00, d: 0.0000%, tcr: 16, cpr: 63.875, div: 61154
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With the baud base set to 15625000 and the unsigned 16-bit UART_DIV_MAX
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limitation imposed by ``serial8250_get_baud_rate`` standard baud rates
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below 300bps become unavailable in the regular way, e.g. the rate of
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200bps requires the baud base to be divided by 78125 and that is beyond
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the unsigned 16-bit range. The historic spd_cust feature can still be
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used by encoding the values for, the prescaler, the oversampling rate
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and the clock divisor (DLM/DLL) as follows to obtain such rates if so
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required:
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::
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31 29 28 20 19 16 15 0
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+-----+-----------------+-------+-------------------------------+
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|0 0 0| CPR2:CPR | TCR | DLM:DLL |
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+-----+-----------------+-------+-------------------------------+
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Use a value such encoded for the ``custom_divisor`` field along with the
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ASYNC_SPD_CUST flag set in the ``flags`` field in ``struct serial_struct``
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passed with the TIOCSSERIAL ioctl(2), such as with the setserial(8)
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utility and its ``divisor`` and ``spd_cust`` parameters, and then select
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the baud rate of 38400bps. Note that the value of 0 in TCR sets the
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oversampling rate to 16 and prescaler values below 1 in CPR2/CPR are
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clamped by the driver to 1.
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For example the value of 0x1f4004e2 will set CPR2/CPR, TCR and DLM/DLL
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respectively to 0x1f4, 0x0 and 0x04e2, choosing the prescaler value,
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the oversampling rate and the clock divisor of 62.500, 16 and 1250
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respectively. These parameters will set the baud rate for the serial
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port to 62500000 / 62.500 / 1250 / 16 = 50bps.
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Maciej W. Rozycki <macro@orcam.me.uk>
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.. [OX200] "OXPCIe200 PCI Express Multi-Port Bridge", Oxford Semiconductor,
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Inc., DS-0045, 10 Nov 2008, Section "950 Mode", pp. 64-65
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.. [OX952] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port",
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Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Section "950 Mode",
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p. 20
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.. [OX954] "OXPCIe954 PCI Express Bridge to Quad Serial Port", Oxford
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Semiconductor, Inc., DS-0047, Feb 08, Section "950 Mode", p. 20
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.. [OX958] "OXPCIe958 PCI Express Bridge to Octal Serial Port", Oxford
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Semiconductor, Inc., DS-0048, Feb 08, Section "950 Mode", p. 20
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
문서 식별
1-5이 문서는 GPL-2.0 SPDX license를 따르며 Oxford Semiconductor PCIe Tornado 950 serial-port device의 clock과 baud-rate programming을 설명합니다.
.. SPDX-License-Identifier: GPL-2.0
====================================================================
Notes on Oxford Semiconductor PCIe (Tornado) 950 serial port devices
====================================================================Baud-rate clock chain
6-24Oxford Semiconductor PCIe Tornado 950 serial-port device는 100MHz PCI Express clock에서 만든 고정 62.5MHz input clock으로 구동됩니다.
Baud generator는 먼저 input frequency를 clock prescaler로 나눕니다. Prescaler는 1부터 63.875까지 0.125 간격으로 설정할 수 있습니다. 이어서 original 8250과 같은 16-bit divisor가 1~65535 범위에서 한 번 더 나누고, 마지막으로 4~16 범위의 programmable oversampling rate가 나누어 실제 baud rate를 정합니다. 이 방식으로 15,625,000bps부터 0.933bps까지 얻을 수 있습니다.
기본 oversampling rate는 16이고 clock prescaler는 33.875입니다. 따라서 일반 16-bit divisor의 reference frequency는 115313.653이 되며 original 8250의 115200에 충분히 가깝습니다. 추가 clock control을 모르는 software도 같은 divisor 값으로 요청한 baud rate를 얻을 수 있습니다.
Oxford Semiconductor PCIe (Tornado) 950 serial port devices are driven
by a fixed 62.5MHz clock input derived from the 100MHz PCI Express clock.
The baud rate produced by the baud generator is obtained from this input
frequency by dividing it by the clock prescaler, which can be set to any
value from 1 to 63.875 in increments of 0.125, and then the usual 16-bit
divisor is used as with the original 8250, to divide the frequency by a
value from 1 to 65535. Finally a programmable oversampling rate is used
that can take any value from 4 to 16 to divide the frequency further and
determine the actual baud rate used. Baud rates from 15625000bps down
to 0.933bps can be obtained this way.
By default the oversampling rate is set to 16 and the clock prescaler is
set to 33.875, meaning that the frequency to be used as the reference
for the usual 16-bit divisor is 115313.653, which is close enough to the
frequency of 115200 used by the original 8250 for the same values to be
used for the divisor to obtain the requested baud rates by software that
is unaware of the extra clock controls available.TCR·CPR·CPR2 programming
25-39Oversampling rate는 TCR register, clock prescaler는 CPR/CPR2 register pair로 programming합니다. Prescaler를 기본 33.875에서 바꾸려면 EFR bit 4를 설정해 enhanced mode를 명시적으로 enable해야 합니다.
Enhanced mode에서 MCR bit 7을 설정하면 prescaler를 사용하고, clear하면 값 1을 쓴 것처럼 bypass합니다. CPR에 어떤 값이든 쓰면 CPR2가 clear됩니다. 이는 CPR2의 추가 prescaler 9번째 bit가 없던 구형 conventional PCI Oxford device용 software와 호환하기 위한 동작이므로 CPR/CPR2 pair는 올바른 순서로 programming해야 합니다.
이 parameter를 사용하면 standard rate와 많은 non-standard rate에서 정확하거나 매우 정확한 실제 bit rate를 15,625,000bps부터 1bps까지 만들 수 있습니다.
The oversampling rate is programmed with the TCR register and the clock
prescaler is programmed with the CPR/CPR2 register pair [OX200]_ [OX952]_
[OX954]_ [OX958]_. To switch away from the default value of 33.875 for
the prescaler the enhanced mode has to be explicitly enabled though, by
setting bit 4 of the EFR. In that mode setting bit 7 in the MCR enables
the prescaler or otherwise it is bypassed as if the value of 1 was used.
Additionally writing any value to CPR clears CPR2 for compatibility with
old software written for older conventional PCI Oxford Semiconductor
devices that do not have the extra prescaler's 9th bit in CPR2, so the
CPR/CPR2 register pair has to be programmed in the right order.
By using these parameters rates from 15625000bps down to 1bps can be
obtained, with either exact or highly-accurate actual bit rates for
standard and many non-standard rates.Baud-rate 계산 사례
40-87다음 수치는 새 `get_divisor` handler가 만든 결과입니다. `r`은 requested rate, `a`는 actual rate, `d`는 요청 대비 deviation, `tcr`은 oversampling rate, `cpr`은 clock prescaler, `div`는 divisor입니다. 원문의 모든 standard·non-standard 사례를 그대로 보존합니다.
r: 15625000, a: 15625000.00, d: 0.0000%, tcr: 4, cpr: 1.000, div: 1
r: 12500000, a: 12500000.00, d: 0.0000%, tcr: 5, cpr: 1.000, div: 1
r: 10416666, a: 10416666.67, d: 0.0000%, tcr: 6, cpr: 1.000, div: 1
r: 8928571, a: 8928571.43, d: 0.0000%, tcr: 7, cpr: 1.000, div: 1
r: 7812500, a: 7812500.00, d: 0.0000%, tcr: 8, cpr: 1.000, div: 1
r: 4000000, a: 4000000.00, d: 0.0000%, tcr: 5, cpr: 3.125, div: 1
r: 3686400, a: 3676470.59, d: -0.2694%, tcr: 8, cpr: 2.125, div: 1
r: 3500000, a: 3496503.50, d: -0.0999%, tcr: 13, cpr: 1.375, div: 1
r: 3000000, a: 2976190.48, d: -0.7937%, tcr: 14, cpr: 1.500, div: 1
r: 2500000, a: 2500000.00, d: 0.0000%, tcr: 10, cpr: 2.500, div: 1
r: 2000000, a: 2000000.00, d: 0.0000%, tcr: 10, cpr: 3.125, div: 1
r: 1843200, a: 1838235.29, d: -0.2694%, tcr: 16, cpr: 2.125, div: 1
r: 1500000, a: 1492537.31, d: -0.4975%, tcr: 5, cpr: 8.375, div: 1
r: 1152000, a: 1152073.73, d: 0.0064%, tcr: 14, cpr: 3.875, div: 1
r: 921600, a: 919117.65, d: -0.2694%, tcr: 16, cpr: 2.125, div: 2
r: 576000, a: 576036.87, d: 0.0064%, tcr: 14, cpr: 3.875, div: 2
r: 460800, a: 460829.49, d: 0.0064%, tcr: 7, cpr: 3.875, div: 5
r: 230400, a: 230414.75, d: 0.0064%, tcr: 14, cpr: 3.875, div: 5
r: 115200, a: 115207.37, d: 0.0064%, tcr: 14, cpr: 1.250, div: 31
r: 57600, a: 57603.69, d: 0.0064%, tcr: 8, cpr: 3.875, div: 35
r: 38400, a: 38402.46, d: 0.0064%, tcr: 14, cpr: 3.875, div: 30
r: 19200, a: 19201.23, d: 0.0064%, tcr: 8, cpr: 3.875, div: 105
r: 9600, a: 9600.06, d: 0.0006%, tcr: 9, cpr: 1.125, div: 643
r: 4800, a: 4799.98, d: -0.0004%, tcr: 7, cpr: 2.875, div: 647
r: 2400, a: 2400.02, d: 0.0008%, tcr: 9, cpr: 2.250, div: 1286
r: 1200, a: 1200.00, d: 0.0000%, tcr: 14, cpr: 2.875, div: 1294
r: 300, a: 300.00, d: 0.0000%, tcr: 11, cpr: 2.625, div: 7215
r: 200, a: 200.00, d: 0.0000%, tcr: 16, cpr: 1.250, div: 15625
r: 150, a: 150.00, d: 0.0000%, tcr: 13, cpr: 2.250, div: 14245
r: 134, a: 134.00, d: 0.0000%, tcr: 11, cpr: 2.625, div: 16153
r: 110, a: 110.00, d: 0.0000%, tcr: 12, cpr: 1.000, div: 47348
r: 75, a: 75.00, d: 0.0000%, tcr: 4, cpr: 5.875, div: 35461
r: 50, a: 50.00, d: 0.0000%, tcr: 16, cpr: 1.250, div: 62500
r: 25, a: 25.00, d: 0.0000%, tcr: 16, cpr: 2.500, div: 62500
r: 4, a: 4.00, d: 0.0000%, tcr: 16, cpr: 20.000, div: 48828
r: 2, a: 2.00, d: 0.0000%, tcr: 16, cpr: 40.000, div: 48828
r: 1, a: 1.00, d: 0.0000%, tcr: 16, cpr: 63.875, div: 61154
Here are the figures for the standard and some non-standard baud rates
(including those quoted in Oxford Semiconductor documentation), giving
the requested rate (r), the actual rate yielded (a) and its deviation
from the requested rate (d), and the values of the oversampling rate
(tcr), the clock prescaler (cpr) and the divisor (div) produced by the
new ``get_divisor`` handler:
::
r: 15625000, a: 15625000.00, d: 0.0000%, tcr: 4, cpr: 1.000, div: 1
r: 12500000, a: 12500000.00, d: 0.0000%, tcr: 5, cpr: 1.000, div: 1
r: 10416666, a: 10416666.67, d: 0.0000%, tcr: 6, cpr: 1.000, div: 1
r: 8928571, a: 8928571.43, d: 0.0000%, tcr: 7, cpr: 1.000, div: 1
r: 7812500, a: 7812500.00, d: 0.0000%, tcr: 8, cpr: 1.000, div: 1
r: 4000000, a: 4000000.00, d: 0.0000%, tcr: 5, cpr: 3.125, div: 1
r: 3686400, a: 3676470.59, d: -0.2694%, tcr: 8, cpr: 2.125, div: 1
r: 3500000, a: 3496503.50, d: -0.0999%, tcr: 13, cpr: 1.375, div: 1
r: 3000000, a: 2976190.48, d: -0.7937%, tcr: 14, cpr: 1.500, div: 1
r: 2500000, a: 2500000.00, d: 0.0000%, tcr: 10, cpr: 2.500, div: 1
r: 2000000, a: 2000000.00, d: 0.0000%, tcr: 10, cpr: 3.125, div: 1
r: 1843200, a: 1838235.29, d: -0.2694%, tcr: 16, cpr: 2.125, div: 1
r: 1500000, a: 1492537.31, d: -0.4975%, tcr: 5, cpr: 8.375, div: 1
r: 1152000, a: 1152073.73, d: 0.0064%, tcr: 14, cpr: 3.875, div: 1
r: 921600, a: 919117.65, d: -0.2694%, tcr: 16, cpr: 2.125, div: 2
r: 576000, a: 576036.87, d: 0.0064%, tcr: 14, cpr: 3.875, div: 2
r: 460800, a: 460829.49, d: 0.0064%, tcr: 7, cpr: 3.875, div: 5
r: 230400, a: 230414.75, d: 0.0064%, tcr: 14, cpr: 3.875, div: 5
r: 115200, a: 115207.37, d: 0.0064%, tcr: 14, cpr: 1.250, div: 31
r: 57600, a: 57603.69, d: 0.0064%, tcr: 8, cpr: 3.875, div: 35
r: 38400, a: 38402.46, d: 0.0064%, tcr: 14, cpr: 3.875, div: 30
r: 19200, a: 19201.23, d: 0.0064%, tcr: 8, cpr: 3.875, div: 105
r: 9600, a: 9600.06, d: 0.0006%, tcr: 9, cpr: 1.125, div: 643
r: 4800, a: 4799.98, d: -0.0004%, tcr: 7, cpr: 2.875, div: 647
r: 2400, a: 2400.02, d: 0.0008%, tcr: 9, cpr: 2.250, div: 1286
r: 1200, a: 1200.00, d: 0.0000%, tcr: 14, cpr: 2.875, div: 1294
r: 300, a: 300.00, d: 0.0000%, tcr: 11, cpr: 2.625, div: 7215
r: 200, a: 200.00, d: 0.0000%, tcr: 16, cpr: 1.250, div: 15625
r: 150, a: 150.00, d: 0.0000%, tcr: 13, cpr: 2.250, div: 14245
r: 134, a: 134.00, d: 0.0000%, tcr: 11, cpr: 2.625, div: 16153
r: 110, a: 110.00, d: 0.0000%, tcr: 12, cpr: 1.000, div: 47348
r: 75, a: 75.00, d: 0.0000%, tcr: 4, cpr: 5.875, div: 35461
r: 50, a: 50.00, d: 0.0000%, tcr: 16, cpr: 1.250, div: 62500
r: 25, a: 25.00, d: 0.0000%, tcr: 16, cpr: 2.500, div: 62500
r: 4, a: 4.00, d: 0.0000%, tcr: 16, cpr: 20.000, div: 48828
r: 2, a: 2.00, d: 0.0000%, tcr: 16, cpr: 40.000, div: 48828
r: 1, a: 1.00, d: 0.0000%, tcr: 16, cpr: 63.875, div: 61154
300bps 미만 custom_divisor encoding
88-110Baud base를 15,625,000으로 설정하고 `serial8250_get_baud_rate`가 unsigned 16-bit `UART_DIV_MAX`로 제한하면 일반 방식으로 300bps 미만 standard rate를 사용할 수 없습니다. 예를 들어 200bps는 baud base를 78125로 나눠야 해 unsigned 16-bit 범위를 넘습니다.
필요하면 historic `spd_cust` 기능을 사용해 prescaler, oversampling rate, clock divisor(DLM/DLL)를 `custom_divisor`에 encoding할 수 있습니다. Bits 31~29는 0, bits 28~20은 `CPR2:CPR`, bits 19~16은 `TCR`, bits 15~0은 `DLM:DLL`입니다.
Bit 범위폭Field의미
31~2930 0 0Reserved, 0으로 설정
28~209CPR2:CPRClock prescaler
19~164TCROversampling rate
15~016DLM:DLLClock divisor
원문의 ASCII bitfield를 동일한 bit 범위와 field 의미로 구조화했습니다.
이 값을 `struct serial_struct`의 `custom_divisor`에 넣고 `flags`에 `ASYNC_SPD_CUST`를 설정한 뒤 `TIOCSSERIAL` ioctl(2)로 전달합니다. `setserial(8)`의 `divisor`·`spd_cust` parameter를 사용할 수도 있습니다. 이후 38400bps를 선택하면 encoded parameter가 적용됩니다.
TCR 값 0은 oversampling rate 16을 뜻합니다. CPR2/CPR의 prescaler가 1 미만이면 driver가 1로 clamp합니다.
With the baud base set to 15625000 and the unsigned 16-bit UART_DIV_MAX
limitation imposed by ``serial8250_get_baud_rate`` standard baud rates
below 300bps become unavailable in the regular way, e.g. the rate of
200bps requires the baud base to be divided by 78125 and that is beyond
the unsigned 16-bit range. The historic spd_cust feature can still be
used by encoding the values for, the prescaler, the oversampling rate
and the clock divisor (DLM/DLL) as follows to obtain such rates if so
required:
::
31 29 28 20 19 16 15 0
+-----+-----------------+-------+-------------------------------+
|0 0 0| CPR2:CPR | TCR | DLM:DLL |
+-----+-----------------+-------+-------------------------------+
Use a value such encoded for the ``custom_divisor`` field along with the
ASYNC_SPD_CUST flag set in the ``flags`` field in ``struct serial_struct``
passed with the TIOCSSERIAL ioctl(2), such as with the setserial(8)
utility and its ``divisor`` and ``spd_cust`` parameters, and then select
the baud rate of 38400bps. Note that the value of 0 in TCR sets the
oversampling rate to 16 and prescaler values below 1 in CPR2/CPR are
clamped by the driver to 1.50bps encoding 예제
111-118예제 값 `0x1f4004e2`는 CPR2/CPR, TCR, DLM/DLL을 각각 `0x1f4`, `0x0`, `0x04e2`로 설정합니다. 이는 prescaler 62.500, oversampling rate 16, clock divisor 1250을 선택합니다.
따라서 serial port baud rate는 `62500000 / 62.500 / 1250 / 16 = 50bps`입니다. 문서 저자는 Maciej W. Rozycki <macro@orcam.me.uk>입니다.
For example the value of 0x1f4004e2 will set CPR2/CPR, TCR and DLM/DLL
respectively to 0x1f4, 0x0 and 0x04e2, choosing the prescaler value,
the oversampling rate and the clock divisor of 62.500, 16 and 1250
respectively. These parameters will set the baud rate for the serial
port to 62500000 / 62.500 / 1250 / 16 = 50bps.
Maciej W. Rozycki <macro@orcam.me.uk>Hardware reference
119-131Reference는 Oxford Semiconductor의 OXPCIe200 Multi-Port Bridge DS-0045(2008-11-10, 950 Mode, pp.64-65), OXPCIe952 Dual Serial & Parallel Port DS-0046(2008-03-06, p.20), OXPCIe954 Quad Serial Port DS-0047(2008-02, p.20), OXPCIe958 Octal Serial Port DS-0048(2008-02, p.20) datasheet입니다.
.. [OX200] "OXPCIe200 PCI Express Multi-Port Bridge", Oxford Semiconductor,
Inc., DS-0045, 10 Nov 2008, Section "950 Mode", pp. 64-65
.. [OX952] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port",
Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Section "950 Mode",
p. 20
.. [OX954] "OXPCIe954 PCI Express Bridge to Quad Serial Port", Oxford
Semiconductor, Inc., DS-0047, Feb 08, Section "950 Mode", p. 20
.. [OX958] "OXPCIe958 PCI Express Bridge to Octal Serial Port", Oxford
Semiconductor, Inc., DS-0048, Feb 08, Section "950 Mode", p. 20
요약·해설
oxsemi-tornado.rst:1-131실제 baud rate는 62.5MHz input을 programmable prescaler, 16-bit divisor, oversampling rate로 차례로 나눠 만듭니다. 일반 8250 software 호환용 기본값과 300bps 미만을 위한 packed custom_divisor 경로를 모두 제공합니다.
세 단계 divisor가 고정 input clock을 실제 serial bit rate로 변환합니다.
300bps 미만 rate에서 쓰는 32-bit encoding입니다.