Aspeed Watchdog Timer Controllers

Aspeed 워치독 컨트롤러

GPL-2.0-only 또는 BSD-2-Clause로 배포되는 이 스키마는 Aspeed AST2400, AST2500, AST2600 워치독 타이머 컨트롤러를 정의합니다. 관리자는 Andrew Jeffery입니다.

호환 기종과 counter 클록

`compatible`은 `aspeed,ast2400-wdt`, `aspeed,ast2500-wdt`, `aspeed,ast2600-wdt` 중 하나이고 `reg`는 하나의 영역입니다. `clocks`는 watchdog counter를 구동하는 클록 하나를 가리킵니다.

AST2500부터는 1MHz 클록 이외의 source를 선택할 수 없으므로 `clocks` 속성은 선택 사항입니다.

properties:
  compatible:
    enum:
      - aspeed,ast2400-wdt
      - aspeed,ast2500-wdt
      - aspeed,ast2600-wdt

  reg:
    maxItems: 1

  clocks:
    maxItems: 1
    description: >
      The clock used to drive the watchdog counter. From the AST2500 no source
      other than the 1MHz clock can be selected, so the clocks property is
      optional.

CPU·SoC·system·none reset

`aspeed,reset-type`은 timeout 때 생성할 reset 종류를 정하며 기본값은 `system`입니다. `cpu`는 processor만 reset합니다. `soc`는 설정 가능한 SoC controller 일부를 reset하되 SoC 동작에 필수적인 controller는 유지할 수 있고, AST2500·AST2600에서는 `aspeed,reset-mask`로 대상을 지정할 수 있습니다.

`system`은 `EXTRST`가 assert된 것처럼 모든 controller를 reset합니다. `none`은 timeout이 reset을 일으키지 않게 하므로 chip reset에는 다른 watchdog engine을 사용해야 합니다.

aspeed,reset-type:
  $ref: /schemas/types.yaml#/definitions/string
  enum:
    - cpu
    - soc
    - system
    - none
  default: system
  description: >
    The watchdog can be programmed to generate one of three different types of
    reset when a timeout occcurs.

    Specifying 'cpu' will only reset the processor on a timeout event.

    Specifying 'soc' will reset a configurable subset of the SoC's controllers
    on a timeout event. Controllers critical to the SoC's operation may remain
    untouched. The set of SoC controllers to reset may be specified via the
    aspeed,reset-mask property if the node has the aspeed,ast2500-wdt or
    aspeed,ast2600-wdt compatible.

    Specifying 'system' will reset all controllers on a timeout event, as if
    EXTRST had been asserted.

    Specifying 'none' will cause the timeout event to have no reset effect.
    Another watchdog engine on the chip must be used for chip reset operations.

대체 boot와 외부 pulse 신호

`aspeed,alt-boot`는 timeout 발생 시 SoC가 alternative boot region에서 부팅하도록 설정합니다. `aspeed,external-signal`은 해당 watchdog instance의 외부 신호 pin에 timeout event를 assert하며 pin mux도 알맞게 설정되어야 합니다.

`aspeed,ext-pulse-duration`은 외부 pin에 출력하는 pulse 길이를 microsecond 단위로 정합니다. `aspeed,ext-push-pull`을 지정하면 drive type이 push-pull이고, 생략하면 open-drain입니다. external signal과 push-pull을 모두 사용할 때 `aspeed,ext-active-high`을 지정하면 active-high, 생략하면 active-low polarity가 됩니다.

aspeed,alt-boot:
  $ref: /schemas/types.yaml#/definitions/flag
  description: >
    Direct the watchdog to configure the SoC to boot from the alternative boot
    region if a timeout occurs.

aspeed,external-signal:
  $ref: /schemas/types.yaml#/definitions/flag
  description: >
    Assert the timeout event on an external signal pin associated with the
    watchdog controller instance. The pin must be muxed appropriately.

aspeed,ext-pulse-duration:
  $ref: /schemas/types.yaml#/definitions/uint32
  description: >
    The duration, in microseconds, of the pulse emitted on the external signal
    pin.

aspeed,ext-push-pull:
  $ref: /schemas/types.yaml#/definitions/flag
  description: >
    If aspeed,external-signal is specified in the node, set the external
    signal pin's drive type to push-pull. If aspeed,ext-push-pull is not
    specified then the pin is configured as open-drain.

aspeed,ext-active-high:
  $ref: /schemas/types.yaml#/definitions/flag
  description: >
    If both aspeed,external-signal and aspeed,ext-push-pull are specified in
    the node, set the pulse polarity to active-high. If aspeed,ext-active-high
    is not specified then the pin is configured as active-low.

세대별 reset mask와 조건

`aspeed,reset-mask`는 watchdog timer 만료 시 reset할 peripheral을 나타내는 bitmask입니다. AST2500은 `AST2500_WDT_RESET_*` macro로 만든 word 하나를 사용합니다. AST2600은 첫 word에 `AST2600_WDT_RESET1_*`, 둘째 word에 `AST2600_WDT_RESET2_*` macro를 쓰는 2-word 배열을 사용합니다.

`compatible`과 `reg`가 필수입니다. `aspeed,ext-push-pull`, `aspeed,ext-active-high`, `aspeed,reset-mask` 중 하나라도 쓰면 compatible은 AST2500 또는 AST2600이어야 합니다. `aspeed,ext-active-high`을 쓰려면 `aspeed,ext-push-pull`도 반드시 필요합니다. 정의되지 않은 추가 속성은 허용하지 않습니다.

  aspeed,reset-mask:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 1
    maxItems: 2
    description: >
      A bitmask indicating which peripherals will be reset if the watchdog
      timer expires. On AST2500 SoCs this should be a single word defined using
      the AST2500_WDT_RESET_* macros; on AST2600 SoCs this should be a two-word
      array with the first word defined using the AST2600_WDT_RESET1_* macros,
      and the second word defined using the AST2600_WDT_RESET2_* macros.

required:
  - compatible
  - reg

allOf:
  - if:
      anyOf:
        - required:
            - aspeed,ext-push-pull
        - required:
            - aspeed,ext-active-high
        - required:
            - aspeed,reset-mask
    then:
      properties:
        compatible:
          enum:
            - aspeed,ast2500-wdt
            - aspeed,ast2600-wdt
  - if:
      required:
        - aspeed,ext-active-high
    then:
      required:
        - aspeed,ext-push-pull

additionalProperties: false

AST2400·AST2600 reset 예제

첫 예제는 주소 `0x1e785000`의 AST2400에서 `system` reset과 external signal을 사용합니다. 둘째 예제는 주소 `0x1e785040`의 AST2600에서 `soc` reset을 선택하고, 기본 RESET1 mask와 LPC를 제외한 RESET2 mask를 조합합니다.

examples:
  - |
    watchdog@1e785000 {
        compatible = "aspeed,ast2400-wdt";
        reg = <0x1e785000 0x1c>;
        aspeed,reset-type = "system";
        aspeed,external-signal;
    };
  - |
    #include <dt-bindings/watchdog/aspeed-wdt.h>
    watchdog@1e785040 {
        compatible = "aspeed,ast2600-wdt";
        reg = <0x1e785040 0x40>;
        aspeed,reset-type = "soc";
        aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
                            (AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
    };