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Linux 6.18.37 · Devicetree Bindings / USB

NVIDIA Tegra210 xHCI Controller

Tegra210 XUSB의 세 register, 11개 clock, PHY·power와 hard-wired Ethernet을 설명합니다.

Source pathDocumentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

nvidia,tegra210-xusb.yaml:1-195

Tegra210 XUSB의 세 register, 11개 clock, PHY·power와 hard-wired Ethernet을 설명합니다. 접을 수 있는 영어 원문 전체와 한국어 전문 번역을 함께 제공하며, compatible, register, interrupt, clock, PHY, power, source path와 원문 줄 좌표를 원형대로 보존합니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA Tegra210 xHCI controller
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
14 exposed by the Tegra XUSB pad controller.
15
16 properties:
17 compatible:
18 const: nvidia,tegra210-xusb
19
20 reg:
21 items:
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24 - description: base and length of the XUSB IPFS registers
25
26 reg-names:
27 items:
28 - const: hcd
29 - const: fpci
30 - const: ipfs
31
32 interrupts:
33 items:
34 - description: xHCI host interrupt
35 - description: mailbox interrupt
36
37 clocks:
38 items:
39 - description: XUSB host clock
40 - description: XUSB host source clock
41 - description: XUSB Falcon source clock
42 - description: XUSB SuperSpeed clock
43 - description: XUSB SuperSpeed clock divider
44 - description: XUSB SuperSpeed source clock
45 - description: XUSB HighSpeed clock source
46 - description: XUSB FullSpeed clock source
47 - description: USB PLL
48 - description: reference clock
49 - description: I/O PLL
50
51 clock-names:
52 items:
53 - const: xusb_host
54 - const: xusb_host_src
55 - const: xusb_falcon_src
56 - const: xusb_ss
57 - const: xusb_ss_div2
58 - const: xusb_ss_src
59 - const: xusb_hs_src
60 - const: xusb_fs_src
61 - const: pll_u_480m
62 - const: clk_m
63 - const: pll_e
64
65 resets:
66 items:
67 - description: reset for the XUSB host controller
68 - description: reset for the SuperSpeed logic
69 - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
70
71 reset-names:
72 items:
73 - const: xusb_host
74 - const: xusb_ss
75 - const: xusb_src
76
77 nvidia,xusb-padctl:
78 $ref: /schemas/types.yaml#/definitions/phandle
79 description: phandle to the XUSB pad controller that is used to configure
80 the USB pads used by the XHCI controller
81
82 phys:
83 minItems: 1
84 maxItems: 9
85
86 phy-names:
87 minItems: 1
88 maxItems: 9
89 items:
90 enum:
91 - usb2-0
92 - usb2-1
93 - usb2-2
94 - usb2-3
95 - hsic-0
96 - usb3-0
97 - usb3-1
98 - usb3-2
99 - usb3-3
100
101 power-domains:
102 items:
103 - description: XUSBC power domain (for Host and USB 2.0)
104 - description: XUSBA power domain (for SuperSpeed)
105
106 power-domain-names:
107 items:
108 - const: xusb_host
109 - const: xusb_ss
110
111 dvddio-pex-supply:
112 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
113
114 hvddio-pex-supply:
115 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
116
117 avdd-usb-supply:
118 description: USB controller power supply. Must supply 3.3 V.
119
120 avdd-pll-utmip-supply:
121 description: UTMI PLL power supply. Must supply 1.8 V.
122
123 avdd-pll-uerefe-supply:
124 description: PLLE reference PLL power supply. Must supply 1.05 V.
125
126 dvdd-usb-ss-pll-supply:
127 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
128
129 hvdd-usb-ss-pll-e-supply:
130 description: High-voltage PLLE power supply. Must supply 1.8 V.
131
132 allOf:
133 - $ref: usb-xhci.yaml
134
135 unevaluatedProperties: false
136
137 examples:
138 - |
139 #include <dt-bindings/clock/tegra210-car.h>
140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141
142 usb@70090000 {
143 compatible = "nvidia,tegra210-xusb";
144 reg = <0x70090000 0x8000>,
145 <0x70098000 0x1000>,
146 <0x70099000 0x1000>;
147 reg-names = "hcd", "fpci", "ipfs";
148
149 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
151
152 clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
153 <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
154 <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
155 <&tegra_car TEGRA210_CLK_XUSB_SS>,
156 <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
157 <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
158 <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
159 <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
160 <&tegra_car TEGRA210_CLK_PLL_U_480M>,
161 <&tegra_car TEGRA210_CLK_CLK_M>,
162 <&tegra_car TEGRA210_CLK_PLL_E>;
163 clock-names = "xusb_host", "xusb_host_src",
164 "xusb_falcon_src", "xusb_ss",
165 "xusb_ss_div2", "xusb_ss_src",
166 "xusb_hs_src", "xusb_fs_src",
167 "pll_u_480m", "clk_m", "pll_e";
168 resets = <&tegra_car 89>, <&tegra_car 156>,
169 <&tegra_car 143>;
170 reset-names = "xusb_host", "xusb_ss", "xusb_src";
171 power-domains = <&pd_xusbhost>, <&pd_xusbss>;
172 power-domain-names = "xusb_host", "xusb_ss";
173
174 nvidia,xusb-padctl = <&padctl>;
175
176 phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_2>, <&phy_usb2_3>,
177 <&phy_pcie_6>, <&phy_pcie_5>;
178 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
179 "usb3-1";
180 dvddio-pex-supply = <&vdd_pex_1v05>;
181 hvddio-pex-supply = <&vdd_1v8>;
182 avdd-usb-supply = <&vdd_3v3_sys>;
183 avdd-pll-utmip-supply = <&vdd_1v8>;
184 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
185 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
186 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
187
188 #address-cells = <1>;
189 #size-cells = <0>;
190
191 ethernet@1 {
192 compatible = "usb955,9ff";
193 reg = <1>;
194 };
195 };
196

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

NVIDIA Tegra210 xHCI

1-15

GPL-2.0-only 또는 BSD-2-Clause로 배포되는 이 schema는 NVIDIA Tegra210 xHCI controller를 정의합니다. Tegra XUSB pad controller가 제공하는 USB2와 USB3 interface를 모두 지원하며 관리자는 Thierry Reding과 Jon Hunter입니다.

세 register와 두 interrupt

16-36

`compatible`은 `nvidia,tegra210-xusb`입니다. register는 xHCI host용 `hcd`, XUSB FPCI용 `fpci`, XUSB IPFS용 `ipfs` 순서의 세 개입니다. interrupt는 xHCI host와 mailbox 순서의 두 개입니다.

properties:
  compatible:
    const: nvidia,tegra210-xusb

  reg:
    items:
      - description: base and length of the xHCI host registers
      - description: base and length of the XUSB FPCI registers
      - description: base and length of the XUSB IPFS registers

  reg-names:
    items:
      - const: hcd
      - const: fpci
      - const: ipfs

  interrupts:
    items:
      - description: xHCI host interrupt
      - description: mailbox interrupt

11개 clock, reset과 pad controller

37-80

clock은 XUSB host, host source, Falcon source, SuperSpeed, SuperSpeed divider, SuperSpeed source, High-Speed source, Full-Speed source, USB PLL, reference, I/O PLL 순서입니다.

이름은 `xusb_host`, `xusb_host_src`, `xusb_falcon_src`, `xusb_ss`, `xusb_ss_div2`, `xusb_ss_src`, `xusb_hs_src`, `xusb_fs_src`, `pll_u_480m`, `clk_m`, `pll_e`입니다.

reset은 host controller용 `xusb_host`, SuperSpeed logic용 `xusb_ss`, source clock 공유 reset `xusb_src`입니다. `nvidia,xusb-padctl`은 USB pad를 구성하는 XUSB pad controller phandle입니다.

clocks:
  items:
    - description: XUSB host clock
    - description: XUSB host source clock
    - description: XUSB Falcon source clock
    - description: XUSB SuperSpeed clock
    - description: XUSB SuperSpeed clock divider
    - description: XUSB SuperSpeed source clock
    - description: XUSB HighSpeed clock source
    - description: XUSB FullSpeed clock source
    - description: USB PLL
    - description: reference clock
    - description: I/O PLL

clock-names:
  items:
    - const: xusb_host
    - const: xusb_host_src
    - const: xusb_falcon_src
    - const: xusb_ss
    - const: xusb_ss_div2
    - const: xusb_ss_src
    - const: xusb_hs_src
    - const: xusb_fs_src
    - const: pll_u_480m
    - const: clk_m
    - const: pll_e

resets:
  items:
    - description: reset for the XUSB host controller
    - description: reset for the SuperSpeed logic
    - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.

reset-names:
  items:
    - const: xusb_host
    - const: xusb_ss
    - const: xusb_src

nvidia,xusb-padctl:
  $ref: /schemas/types.yaml#/definitions/phandle
  description: phandle to the XUSB pad controller that is used to configure
    the USB pads used by the XHCI controller

아홉 PHY와 두 power domain

81-110

PHY와 이름은 1~9개이며 USB2 port 0~3, HSIC 0, USB3 port 0~3을 허용합니다.

power domain은 Host·USB2용 XUSBC `xusb_host`와 SuperSpeed용 XUSBA `xusb_ss` 순서입니다.


phys:
  minItems: 1
  maxItems: 9

phy-names:
  minItems: 1
  maxItems: 9
  items:
    enum:
      - usb2-0
      - usb2-1
      - usb2-2
      - usb2-3
      - hsic-0
      - usb3-0
      - usb3-1
      - usb3-2
      - usb3-3

power-domains:
  items:
    - description: XUSBC power domain (for Host and USB 2.0)
    - description: XUSBA power domain (for SuperSpeed)

power-domain-names:
  items:
    - const: xusb_host
    - const: xusb_ss

Tegra210 supply와 공통 schema

111-136

PCIe/USB3 analog logic과 PLL, USB controller, UTMI PLL, PLLE reference에 1.05 V, 1.8 V, 3.3 V supply를 정의합니다.

공통 `usb-xhci.yaml`을 상속하고 평가되지 않은 추가 속성을 허용하지 않습니다. 이 파일에는 별도의 `required` 목록이 없습니다.

  dvddio-pex-supply:
    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.

  hvddio-pex-supply:
    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.

  avdd-usb-supply:
    description: USB controller power supply. Must supply 3.3 V.

  avdd-pll-utmip-supply:
    description: UTMI PLL power supply. Must supply 1.8 V.

  avdd-pll-uerefe-supply:
    description: PLLE reference PLL power supply. Must supply 1.05 V.

  dvdd-usb-ss-pll-supply:
    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.

  hvdd-usb-ss-pll-e-supply:
    description: High-voltage PLLE power supply. Must supply 1.8 V.

allOf:
  - $ref: usb-xhci.yaml

unevaluatedProperties: false

Tegra210 XUSB와 hard-wired Ethernet

137-195

예제 `usb@70090000`은 `hcd`, `fpci`, `ipfs` register, level-high GIC SPI 39·40, 11개 clock과 세 reset을 사용합니다.

XUSBC·XUSBA power domain, pad controller, USB2 port 0~3과 USB3 port 0~1 PHY를 연결하고 각 supply를 지정합니다.

controller 아래 `ethernet@1`은 product `usb955,9ff`인 hard-wired USB Ethernet device를 port 1에 둡니다.

examples:
  - |
    #include <dt-bindings/clock/tegra210-car.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    usb@70090000 {
        compatible = "nvidia,tegra210-xusb";
        reg = <0x70090000 0x8000>,
              <0x70098000 0x1000>,
              <0x70099000 0x1000>;
        reg-names = "hcd", "fpci", "ipfs";

        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
                 <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
                 <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
                 <&tegra_car TEGRA210_CLK_XUSB_SS>,
                 <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
                 <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
                 <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
                 <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
                 <&tegra_car TEGRA210_CLK_PLL_U_480M>,
                 <&tegra_car TEGRA210_CLK_CLK_M>,
                 <&tegra_car TEGRA210_CLK_PLL_E>;
        clock-names = "xusb_host", "xusb_host_src",
                      "xusb_falcon_src", "xusb_ss",
                      "xusb_ss_div2", "xusb_ss_src",
                      "xusb_hs_src", "xusb_fs_src",
                      "pll_u_480m", "clk_m", "pll_e";
        resets = <&tegra_car 89>, <&tegra_car 156>,
                 <&tegra_car 143>;
        reset-names = "xusb_host", "xusb_ss", "xusb_src";
        power-domains = <&pd_xusbhost>, <&pd_xusbss>;
        power-domain-names = "xusb_host", "xusb_ss";

        nvidia,xusb-padctl = <&padctl>;

        phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_2>, <&phy_usb2_3>,
               <&phy_pcie_6>, <&phy_pcie_5>;
        phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
                    "usb3-1";
        dvddio-pex-supply = <&vdd_pex_1v05>;
        hvddio-pex-supply = <&vdd_1v8>;
        avdd-usb-supply = <&vdd_3v3_sys>;
        avdd-pll-utmip-supply = <&vdd_1v8>;
        avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
        dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
        hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;

        #address-cells = <1>;
        #size-cells = <0>;

        ethernet@1 {
            compatible = "usb955,9ff";
            reg = <1>;
        };
    };