NVIDIA Tegra194 xHCI Controller

NVIDIA Tegra194 xHCI

GPL-2.0-only 또는 BSD-2-Clause로 배포되는 이 schema는 NVIDIA Tegra194 xHCI controller를 정의합니다. Tegra XUSB pad controller가 제공하는 USB2와 USB3 interface를 모두 지원하며 관리자는 Thierry Reding과 Jon Hunter입니다.

Register와 host·mailbox interrupt

`compatible`은 `nvidia,tegra194-xusb`입니다. register는 xHCI host용 `hcd`와 XUSB FPCI용 `fpci` 두 개이고, interrupt는 xHCI host와 mailbox 순서입니다.

properties:
  compatible:
    const: nvidia,tegra194-xusb

  reg:
    items:
      - description: base and length of the xHCI host registers
      - description: base and length of the XUSB FPCI registers

  reg-names:
    items:
      - const: hcd
      - const: fpci

  interrupts:
    items:
      - description: xHCI host interrupt
      - description: mailbox interrupt

아홉 clock, interconnect와 IOMMU

clock 구성과 이름은 Tegra186과 같은 아홉 항목으로, host·Falcon·SuperSpeed·HighSpeed·FullSpeed source와 USB PLL·reference·I/O PLL을 포함합니다.

memory interconnect는 read `dma-mem`과 `write` client 두 개이고 IOMMU는 하나만 허용합니다.

clocks:
  items:
    - description: XUSB host clock
    - description: XUSB Falcon source clock
    - description: XUSB SuperSpeed clock
    - description: XUSB SuperSpeed source clock
    - description: XUSB HighSpeed clock source
    - description: XUSB FullSpeed clock source
    - description: USB PLL
    - description: reference clock
    - description: I/O PLL

clock-names:
  items:
    - const: xusb_host
    - const: xusb_falcon_src
    - const: xusb_ss
    - const: xusb_ss_src
    - const: xusb_hs_src
    - const: xusb_fs_src
    - const: pll_u_480m
    - const: clk_m
    - const: pll_e

interconnects:
  items:
    - description: read client
    - description: write client

interconnect-names:
  items:
    - const: dma-mem # read
    - const: write

iommus:
  maxItems: 1

여덟 PHY와 power domain

XUSB pad controller phandle을 사용합니다. PHY와 이름은 1~8개이며 USB2 port 0~3과 USB3 port 0~3을 허용합니다.

power domain은 Host·USB2용 XUSBC `xusb_host`와 SuperSpeed용 XUSBA `xusb_ss`입니다.

nvidia,xusb-padctl:
  $ref: /schemas/types.yaml#/definitions/phandle
  description: phandle to the XUSB pad controller that is used to configure
    the USB pads used by the XHCI controller

phys:
  minItems: 1
  maxItems: 8

phy-names:
  minItems: 1
  maxItems: 8
  items:
    enum:
      - usb2-0
      - usb2-1
      - usb2-2
      - usb2-3
      - usb3-0
      - usb3-1
      - usb3-2
      - usb3-3

power-domains:
  items:
    - description: XUSBC power domain (for Host and USB 2.0)
    - description: XUSBA power domain (for SuperSpeed)

power-domain-names:
  items:
    - const: xusb_host
    - const: xusb_ss

Tegra194 전원과 공통 schema

PCIe/USB3 logic·PLL, USB controller, UTMI PLL, PLLE reference에 필요한 1.05 V, 1.8 V, 3.3 V supply를 정의합니다.

공통 `usb-xhci.yaml`을 상속하고 평가되지 않은 추가 속성을 허용하지 않습니다. 이 파일에도 별도의 `required` 목록은 없습니다.

  dvddio-pex-supply:
    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.

  hvddio-pex-supply:
    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.

  avdd-usb-supply:
    description: USB controller power supply. Must supply 3.3 V.

  avdd-pll-utmip-supply:
    description: UTMI PLL power supply. Must supply 1.8 V.

  avdd-pll-uerefe-supply:
    description: PLLE reference PLL power supply. Must supply 1.05 V.

  dvdd-usb-ss-pll-supply:
    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.

  hvdd-usb-ss-pll-e-supply:
    description: High-voltage PLLE power supply. Must supply 1.8 V.

allOf:
  - $ref: usb-xhci.yaml

unevaluatedProperties: false

Tegra194 BPMP XUSB 예제

예제 `usb@3610000`은 `hcd`, `fpci` register와 level-high GIC SPI 163·164, BPMP clock 아홉 개를 사용합니다.

host read·write interconnect, Tegra194 XUSB host SMMU stream ID, XUSBC·XUSBA power domain과 pad controller를 연결합니다. PHY는 USB2 port 0·1·3과 USB3 port 0·2·3입니다.

examples:
  - |
    #include <dt-bindings/clock/tegra194-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/memory/tegra194-mc.h>
    #include <dt-bindings/power/tegra194-powergate.h>
    #include <dt-bindings/reset/tegra194-reset.h>

    usb@3610000 {
        compatible = "nvidia,tegra194-xusb";
        reg = <0x03610000 0x40000>,
              <0x03600000 0x10000>;
        reg-names = "hcd", "fpci";

        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
                 <&bpmp TEGRA194_CLK_XUSB_FALCON>,
                 <&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
                 <&bpmp TEGRA194_CLK_XUSB_SS>,
                 <&bpmp TEGRA194_CLK_CLK_M>,
                 <&bpmp TEGRA194_CLK_XUSB_FS>,
                 <&bpmp TEGRA194_CLK_UTMIPLL>,
                 <&bpmp TEGRA194_CLK_CLK_M>,
                 <&bpmp TEGRA194_CLK_PLLE>;
        clock-names = "xusb_host", "xusb_falcon_src",
                      "xusb_ss", "xusb_ss_src", "xusb_hs_src",
                      "xusb_fs_src", "pll_u_480m", "clk_m",
                      "pll_e";
        interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
                        <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
        interconnect-names = "dma-mem", "write";
        iommus = <&smmu TEGRA194_SID_XUSB_HOST>;

        power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
                        <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
        power-domain-names = "xusb_host", "xusb_ss";

        nvidia,xusb-padctl = <&xusb_padctl>;

        phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_3>, <&phy_usb3_0>,
               <&phy_usb3_2>, <&phy_usb3_3>;
        phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
    };