Renesas Compare Match Timer

Renesas Compare Match Timer

GPL-2.0-only 또는 BSD-2-Clause 라이선스의 이 스키마는 Renesas Compare Match Timer(CMT)를 정의합니다. CMT는 clock input을 설정하고 compare match를 programming할 수 있는 multi-channel 16/32/48-bit timer/counter입니다. Channel은 hardware resource를 공유하지만 counter와 compare match 값은 서로 독립적입니다. 특정 CMT instance는 해당 model이 지원하는 channel 일부만 구현할 수 있습니다. Channel index는 CMT 내부의 hardware 위치를 나타내므로 datasheet의 channel number와 일치하지 않습니다. Maintainer는 Geert Uytterhoeven와 Laurent Pinchart입니다.

R-Mobile·R-Car Gen2 compatible

R-Mobile A1과 SH-Mobile AG5의 `r8a7740`·`sh73a0` CMT는 SoC별 compatible을 단독 사용합니다. CMT0·2·3·4는 32-bit이고 CMT1은 48-bit입니다. R-Mobile APE6, R-Car Gen2와 RZ/G1의 CMT0는 SoC별 compatible 뒤에 `renesas,rcar-gen2-cmt0`, CMT1은 `renesas,rcar-gen2-cmt1` fallback을 둡니다.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,r8a7740-cmt0      # 32-bit CMT0 on R-Mobile A1
              - renesas,r8a7740-cmt1      # 48-bit CMT1 on R-Mobile A1
              - renesas,r8a7740-cmt2      # 32-bit CMT2 on R-Mobile A1
              - renesas,r8a7740-cmt3      # 32-bit CMT3 on R-Mobile A1
              - renesas,r8a7740-cmt4      # 32-bit CMT4 on R-Mobile A1
              - renesas,sh73a0-cmt0       # 32-bit CMT0 on SH-Mobile AG5
              - renesas,sh73a0-cmt1       # 48-bit CMT1 on SH-Mobile AG5
              - renesas,sh73a0-cmt2       # 32-bit CMT2 on SH-Mobile AG5
              - renesas,sh73a0-cmt3       # 32-bit CMT3 on SH-Mobile AG5
              - renesas,sh73a0-cmt4       # 32-bit CMT4 on SH-Mobile AG5

      - items:
          - enum:
              - renesas,r8a73a4-cmt0      # 32-bit CMT0 on R-Mobile APE6
              - renesas,r8a7742-cmt0      # 32-bit CMT0 on RZ/G1H
              - renesas,r8a7743-cmt0      # 32-bit CMT0 on RZ/G1M
              - renesas,r8a7744-cmt0      # 32-bit CMT0 on RZ/G1N
              - renesas,r8a7745-cmt0      # 32-bit CMT0 on RZ/G1E
              - renesas,r8a77470-cmt0     # 32-bit CMT0 on RZ/G1C
              - renesas,r8a7790-cmt0      # 32-bit CMT0 on R-Car H2
              - renesas,r8a7791-cmt0      # 32-bit CMT0 on R-Car M2-W
              - renesas,r8a7792-cmt0      # 32-bit CMT0 on R-Car V2H
              - renesas,r8a7793-cmt0      # 32-bit CMT0 on R-Car M2-N
              - renesas,r8a7794-cmt0      # 32-bit CMT0 on R-Car E2
          - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1

      - items:
          - enum:
              - renesas,r8a73a4-cmt1      # 48-bit CMT1 on R-Mobile APE6
              - renesas,r8a7742-cmt1      # 48-bit CMT1 on RZ/G1H
              - renesas,r8a7743-cmt1      # 48-bit CMT1 on RZ/G1M
              - renesas,r8a7744-cmt1      # 48-bit CMT1 on RZ/G1N
              - renesas,r8a7745-cmt1      # 48-bit CMT1 on RZ/G1E
              - renesas,r8a77470-cmt1     # 48-bit CMT1 on RZ/G1C
              - renesas,r8a7790-cmt1      # 48-bit CMT1 on R-Car H2
              - renesas,r8a7791-cmt1      # 48-bit CMT1 on R-Car M2-W
              - renesas,r8a7792-cmt1      # 48-bit CMT1 on R-Car V2H
              - renesas,r8a7793-cmt1      # 48-bit CMT1 on R-Car M2-N
              - renesas,r8a7794-cmt1      # 48-bit CMT1 on R-Car E2
          - const: renesas,rcar-gen2-cmt1 # 48-bit CMT1 on R-Mobile APE6, R-Car Gen2 and RZ/G1

R-Car Gen3·Gen4 compatible

R-Car Gen3와 RZ/G2의 32-bit CMT0는 `renesas,rcar-gen3-cmt0`, 48-bit CMT1은 `renesas,rcar-gen3-cmt1` fallback을 사용합니다. R-Car Gen4의 V3U, S4-8, V4H, V4M도 각각 SoC별 compatible 뒤에 32-bit `renesas,rcar-gen4-cmt0` 또는 48-bit `renesas,rcar-gen4-cmt1` fallback을 둡니다.

- items:
    - enum:
        - renesas,r8a774a1-cmt0     # 32-bit CMT0 on RZ/G2M
        - renesas,r8a774b1-cmt0     # 32-bit CMT0 on RZ/G2N
        - renesas,r8a774c0-cmt0     # 32-bit CMT0 on RZ/G2E
        - renesas,r8a774e1-cmt0     # 32-bit CMT0 on RZ/G2H
        - renesas,r8a7795-cmt0      # 32-bit CMT0 on R-Car H3
        - renesas,r8a7796-cmt0      # 32-bit CMT0 on R-Car M3-W
        - renesas,r8a77961-cmt0     # 32-bit CMT0 on R-Car M3-W+
        - renesas,r8a77965-cmt0     # 32-bit CMT0 on R-Car M3-N
        - renesas,r8a77970-cmt0     # 32-bit CMT0 on R-Car V3M
        - renesas,r8a77980-cmt0     # 32-bit CMT0 on R-Car V3H
        - renesas,r8a77990-cmt0     # 32-bit CMT0 on R-Car E3
        - renesas,r8a77995-cmt0     # 32-bit CMT0 on R-Car D3
    - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2

- items:
    - enum:
        - renesas,r8a774a1-cmt1     # 48-bit CMT on RZ/G2M
        - renesas,r8a774b1-cmt1     # 48-bit CMT on RZ/G2N
        - renesas,r8a774c0-cmt1     # 48-bit CMT on RZ/G2E
        - renesas,r8a774e1-cmt1     # 48-bit CMT on RZ/G2H
        - renesas,r8a7795-cmt1      # 48-bit CMT on R-Car H3
        - renesas,r8a7796-cmt1      # 48-bit CMT on R-Car M3-W
        - renesas,r8a77961-cmt1     # 48-bit CMT on R-Car M3-W+
        - renesas,r8a77965-cmt1     # 48-bit CMT on R-Car M3-N
        - renesas,r8a77970-cmt1     # 48-bit CMT on R-Car V3M
        - renesas,r8a77980-cmt1     # 48-bit CMT on R-Car V3H
        - renesas,r8a77990-cmt1     # 48-bit CMT on R-Car E3
        - renesas,r8a77995-cmt1     # 48-bit CMT on R-Car D3
    - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2

- items:
    - enum:
        - renesas,r8a779a0-cmt0     # 32-bit CMT0 on R-Car V3U
        - renesas,r8a779f0-cmt0     # 32-bit CMT0 on R-Car S4-8
        - renesas,r8a779g0-cmt0     # 32-bit CMT0 on R-Car V4H
        - renesas,r8a779h0-cmt0     # 32-bit CMT0 on R-Car V4M
    - const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4

- items:
    - enum:
        - renesas,r8a779a0-cmt1     # 48-bit CMT on R-Car V3U
        - renesas,r8a779f0-cmt1     # 48-bit CMT on R-Car S4-8
        - renesas,r8a779g0-cmt1     # 48-bit CMT on R-Car V4H
        - renesas,r8a779h0-cmt1     # 48-bit CMT on R-Car V4M
    - const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4

공통 resource와 fck

`reg`와 `clocks`, `power-domains`, 선택적인 `resets`는 각각 최대 한 항목입니다. `interrupts`는 1~8개이고 clock 이름은 `fck`입니다. `compatible`, `reg`, `interrupts`, `clocks`, `clock-names`, `power-domains`가 필수입니다.

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 8

  clocks:
    maxItems: 1

  clock-names:
    const: fck

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - power-domains

CMT0 두 개·CMT1 여덟 interrupt

R-Car Gen2·Gen3·Gen4 CMT0 compatible을 포함하면 `interrupts`는 정확히 두 항목이어야 합니다. 같은 세대의 CMT1 compatible을 포함하면 정확히 여덟 항목이어야 합니다. 그 밖의 추가 속성은 허용되지 않습니다.

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,rcar-gen2-cmt0
              - renesas,rcar-gen3-cmt0
              - renesas,rcar-gen4-cmt0
    then:
      properties:
        interrupts:
          minItems: 2
          maxItems: 2

  - if:
      properties:
        compatible:
          contains:
            enum:
              - renesas,rcar-gen2-cmt1
              - renesas,rcar-gen3-cmt1
              - renesas,rcar-gen4-cmt1
    then:
      properties:
        interrupts:
          minItems: 8
          maxItems: 8

additionalProperties: false

R-Car H2 CMT0·CMT1 예제

첫 예제는 `timer@ffca0000`의 R-Car H2 32-bit CMT0에 0x1004-byte register 영역, GIC SPI 142·143 level-high interrupt, CPG module clock/reset 124와 always-on power domain을 지정합니다. 둘째는 `timer@e6130000`의 48-bit CMT1에 같은 크기의 영역, GIC SPI 120~127 여덟 interrupt, CPG module clock/reset 329와 같은 power domain을 지정합니다. 두 node의 clock 이름은 `fck`입니다.

examples:
  - |
    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a7790-sysc.h>
    cmt0: timer@ffca0000 {
        compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
        reg = <0xffca0000 0x1004>;
        interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cpg CPG_MOD 124>;
        clock-names = "fck";
        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
        resets = <&cpg 124>;
    };

    cmt1: timer@e6130000 {
        compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
        reg = <0xe6130000 0x1004>;
        interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cpg CPG_MOD 329>;
        clock-names = "fck";
        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
        resets = <&cpg 329>;
    };