NVIDIA Tegra Timer

Legacy NVIDIA Tegra timer

GPL-2.0-only 라이선스의 이 스키마는 NVIDIA Tegra20·30·114·124·132·210 timer를 정의합니다. Maintainer는 Stephen Warren입니다.

Tegra210의 14 interrupt

Tegra210은 combined interrupt 하나 또는 channel 0~13마다 하나씩 최대 14개 individual interrupt를 사용할 수 있습니다.

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: nvidia,tegra210-timer
    then:
      properties:
        interrupts:
          # Either a single combined interrupt or up to 14 individual interrupts
          minItems: 1
          maxItems: 14
          description: >
            A list of 14 interrupts; one per each timer channels 0 through 13

Tegra30 계열의 6 interrupt

Tegra114·124·132는 Tegra30 fallback을 사용하고 Tegra30은 Tegra20 fallback을 사용합니다. 이 계열은 combined interrupt 하나 또는 최대 6개 individual interrupt를 사용합니다. 여섯 항목은 timer channel 1~5 각각의 interrupt와 나머지 channel이 공유하는 interrupt 하나입니다.

- if:
    properties:
      compatible:
        oneOf:
          - items:
              - enum:
                  - nvidia,tegra114-timer
                  - nvidia,tegra124-timer
                  - nvidia,tegra132-timer
              - const: nvidia,tegra30-timer
          - items:
              - const: nvidia,tegra30-timer
              - const: nvidia,tegra20-timer
  then:
    properties:
      interrupts:
        # Either a single combined interrupt or up to 6 individual interrupts
        minItems: 1
        maxItems: 6
        description: >
          A list of 6 interrupts; one per each of timer channels 1 through 5,
          and one for the shared interrupt for the remaining channels.

Tegra20의 4 interrupt

Tegra20은 combined interrupt 하나 또는 네 timer channel 각각에 대한 최대 4개 individual interrupt를 사용할 수 있습니다.

- if:
    properties:
      compatible:
        const: nvidia,tegra20-timer
  then:
    properties:
      interrupts:
        # Either a single combined interrupt or up to 4 individual interrupts
        minItems: 1
        maxItems: 4
        description: |
          A list of 4 interrupts; one per timer channel.

Counter·watchdog와 timer clock

Tegra210은 29-bit timer counter 14개와 32-bit timestamp counter 하나를 제공합니다. TMR0~TMR9는 oscillator에서 유도한 고정 1 MHz로, TMR10~TMR13은 oscillator clock으로 직접 동작하며 one-shot, periodic, watchdog interrupt를 지원합니다. Tegra30은 29-bit channel 10개, 32-bit free-running counter 하나, watchdog module 5개를 제공하고 첫 두 channel은 legacy watchdog reset도 trigger할 수 있습니다. Tegra20은 29-bit channel 4개와 32-bit free-running counter 하나를 제공하며 첫 두 channel이 watchdog reset을 trigger할 수 있습니다. `reg`와 `clocks`는 각각 최대 한 항목이고 선택적인 `clock-names` 값은 `timer`입니다. `compatible`, `reg`, `interrupts`, `clocks`가 필수이며 추가 속성은 허용되지 않습니다.

properties:
  compatible:
    oneOf:
      - const: nvidia,tegra210-timer
        description: >
          The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit
          timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived
          from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock
          (TMR10-TMR13). Each TMR can be programmed to generate one-shot, periodic,
          or watchdog interrupts.
      - items:
          - enum:
              - nvidia,tegra114-timer
              - nvidia,tegra124-timer
              - nvidia,tegra132-timer
          - const: nvidia,tegra30-timer
      - items:
          - const: nvidia,tegra30-timer
          - const: nvidia,tegra20-timer
        description: >
          The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free
          running counter, and 5 watchdog modules. The first two channels may also
          trigger a legacy watchdog reset.
      - const: nvidia,tegra20-timer
        description: >
          The Tegra20 timer provides four 29-bit timer channels and a single 32-bit free
          running counter. The first two channels may also trigger a watchdog reset.

  reg:
    maxItems: 1

  interrupts: true

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: timer


required:
  - compatible
  - reg
  - interrupts
  - clocks

additionalProperties: false

Tegra30 fallback 예제

첫 예제는 `timer@60005000`에 Tegra30 compatible과 Tegra20 fallback, 0x400-byte register 영역, 여섯 level-high interrupt, `tegra_car` clock index 214를 지정합니다.

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    timer@60005000 {
        compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
        reg = <0x60005000 0x400>;
        interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
                     <0 1 IRQ_TYPE_LEVEL_HIGH>,
                     <0 41 IRQ_TYPE_LEVEL_HIGH>,
                     <0 42 IRQ_TYPE_LEVEL_HIGH>,
                     <0 121 IRQ_TYPE_LEVEL_HIGH>,
                     <0 122 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&tegra_car 214>;
    };

Tegra210 14-channel 예제

둘째 예제는 같은 0x400-byte 영역에 Tegra210 compatible을 사용하고 GIC SPI 156, 0, 1, 41, 42, 121, 152~155, 176~179의 14개 level-high interrupt를 지정합니다. `TEGRA210_CLK_TIMER`를 연결하고 이름을 `timer`로 설정합니다.

- |
  #include <dt-bindings/clock/tegra210-car.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/interrupt-controller/irq.h>

  timer@60005000 {
      compatible = "nvidia,tegra210-timer";
      reg = <0x60005000 0x400>;
      interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&tegra_car TEGRA210_CLK_TIMER>;
      clock-names = "timer";
  };