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Linux 6.18.37 · Devicetree Bindings

Broadcom Cable, DSL and Set-Top Platforms

Broadcom MIPS SoC의 AON power control, MEMC·DDR·arbiter·timer 바인딩입니다.

Source pathDocumentation/devicetree/bindings/mips/brcm/soc.txt
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

soc.txt:1-166

Cable·DSL·STB root 호환성과 suspend를 위한 always-on·memory-controller 계층을 설명합니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 * Broadcom cable/DSL/settop platforms
2
3 Required properties:
4
5 - compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843"
6 "brcm,bcm3384-viper", "brcm,bcm33843-viper"
7 "brcm,bcm6328", "brcm,bcm6358", "brcm,bcm6362", "brcm,bcm6368",
8 "brcm,bcm63168", "brcm,bcm63268",
9 "brcm,bcm7125", "brcm,bcm7346", "brcm,bcm7358", "brcm,bcm7360",
10 "brcm,bcm7362", "brcm,bcm7420", "brcm,bcm7425"
11
12 The experimental -viper variants are for running Linux on the 3384's
13 BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.
14
15 Power management
16 ----------------
17
18 For power management (particularly, S2/S3/S5 system suspend), the following SoC
19 components are needed:
20
21 = Always-On control block (AON CTRL)
22
23 This hardware provides control registers for the "always-on" (even in low-power
24 modes) hardware, such as the Power Management State Machine (PMSM).
25
26 Required properties:
27 - compatible : should be one of
28 "brcm,bcm7425-aon-ctrl"
29 "brcm,bcm7429-aon-ctrl"
30 "brcm,bcm7435-aon-ctrl" and
31 "brcm,brcmstb-aon-ctrl"
32 - reg : the register start and length for the AON CTRL block
33
34 Example:
35
36 syscon@410000 {
37 compatible = "brcm,bcm7425-aon-ctrl", "brcm,brcmstb-aon-ctrl";
38 reg = <0x410000 0x400>;
39 };
40
41 = Memory controllers
42
43 A Broadcom STB SoC typically has a number of independent memory controllers,
44 each of which may have several associated hardware blocks, which are versioned
45 independently (control registers, DDR PHYs, etc.). One might consider
46 describing these controllers as a parent "memory controllers" block, which
47 contains N sub-nodes (one for each controller in the system), each of which is
48 associated with a number of hardware register resources (e.g., its PHY.
49
50 == MEMC (MEMory Controller)
51
52 Represents a single memory controller instance.
53
54 Required properties:
55 - compatible : should contain "brcm,brcmstb-memc" and "simple-bus"
56 - ranges : should contain the child address in the parent address
57 space, must be 0 here, and the register start and length of
58 the entire memory controller (including all sub nodes: DDR PHY,
59 arbiter, etc.)
60 - #address-cells : must be 1
61 - #size-cells : must be 1
62
63 Example:
64
65 memory-controller@0 {
66 compatible = "brcm,brcmstb-memc", "simple-bus";
67 ranges = <0x0 0x0 0xa000>;
68 #address-cells = <1>;
69 #size-cells = <1>;
70
71 memc-arb@1000 {
72 ...
73 };
74
75 memc-ddr@2000 {
76 ...
77 };
78
79 ddr-phy@6000 {
80 ...
81 };
82 };
83
84 Should contain subnodes for any of the following relevant hardware resources:
85
86 == DDR PHY control
87
88 Control registers for this memory controller's DDR PHY.
89
90 Required properties:
91 - compatible : should contain one of these
92 "brcm,brcmstb-ddr-phy-v64.5"
93 "brcm,brcmstb-ddr-phy"
94
95 - reg : the DDR PHY register range and length
96
97 Example:
98
99 ddr-phy@6000 {
100 compatible = "brcm,brcmstb-ddr-phy-v64.5";
101 reg = <0x6000 0xc8>;
102 };
103
104 == DDR memory controller sequencer
105
106 Control registers for this memory controller's DDR memory sequencer
107
108 Required properties:
109 - compatible : should contain one of these
110 "brcm,bcm7425-memc-ddr"
111 "brcm,bcm7429-memc-ddr"
112 "brcm,bcm7435-memc-ddr" and
113 "brcm,brcmstb-memc-ddr"
114
115 - reg : the DDR sequencer register range and length
116
117 Example:
118
119 memc-ddr@2000 {
120 compatible = "brcm,bcm7425-memc-ddr", "brcm,brcmstb-memc-ddr";
121 reg = <0x2000 0x300>;
122 };
123
124 == MEMC Arbiter
125
126 The memory controller arbiter is responsible for memory clients allocation
127 (bandwidth, priorities etc.) and needs to have its contents restored during
128 deep sleep states (S3).
129
130 Required properties:
131
132 - compatible : should contain one of these
133 "brcm,brcmstb-memc-arb-v10.0.0.0"
134 "brcm,brcmstb-memc-arb"
135
136 - reg : the DDR Arbiter register range and length
137
138 Example:
139
140 memc-arb@1000 {
141 compatible = "brcm,brcmstb-memc-arb-v10.0.0.0";
142 reg = <0x1000 0x248>;
143 };
144
145 == Timers
146
147 The Broadcom STB chips contain a timer block with several general purpose
148 timers that can be used.
149
150 Required properties:
151
152 - compatible : should contain one of:
153 "brcm,bcm7425-timers"
154 "brcm,bcm7429-timers"
155 "brcm,bcm7435-timers" and
156 "brcm,brcmstb-timers"
157 - reg : the timers register range
158 - interrupts : the interrupt line for this timer block
159
160 Example:
161
162 timers: timer@4067c0 {
163 compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
164 reg = <0x4067c0 0x40>;
165 interrupts = <&periph_intc 19>;
166 };
167

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

Broadcom cable·DSL·settop 플랫폼

1-14

필수 root `compatible`은 `brcm,bcm3368`, `brcm,bcm3384`, `brcm,bcm33843`, `brcm,bcm3384-viper`, `brcm,bcm33843-viper`, `brcm,bcm6328`, `brcm,bcm6358`, `brcm,bcm6362`, `brcm,bcm6368`, `brcm,bcm63168`, `brcm,bcm63268`, `brcm,bcm7125`, `brcm,bcm7346`, `brcm,bcm7358`, `brcm,bcm7360`, `brcm,bcm7362`, `brcm,bcm7420`, `brcm,bcm7425` 중 하나입니다.

실험적인 `-viper` variant는 BMIPS5000 application processor 대신 BCM3384의 BMIPS4355 cable modem CPU에서 Linux를 실행하기 위한 것입니다.

Broadcom 플랫폼 군
그룹SoC
Cable modemBCM3368, BCM3384, BCM33843
Experimental ViperBCM3384-viper, BCM33843-viper
DSLBCM6328, BCM6358, BCM6362, BCM6368, BCM63168, BCM63268
Set-top boxBCM7125, BCM7346, BCM7358, BCM7360, BCM7362, BCM7420, BCM7425

root 호환 문자열을 용도별 SoC 계열로 묶었습니다.

Always-On control block

15-40

특히 S2·S3·S5 system suspend의 power management에는 Always-On control block(AON CTRL)이 필요합니다. 이 hardware는 Power Management State Machine(PMSM)처럼 low-power mode에서도 항상 켜져 있는 hardware의 control register를 제공합니다.

`compatible`은 chip별 `brcm,bcm7425-aon-ctrl`, `brcm,bcm7429-aon-ctrl`, `brcm,bcm7435-aon-ctrl` 중 하나와 generic `brcm,brcmstb-aon-ctrl`을 사용합니다. `reg`는 AON CTRL block의 register 시작 주소와 길이입니다.

Broadcom suspend 제어
S2 / S3 / S5 requestAON CTRL
AON CTRLPower Management State Machine
PMSMAlways-on hardware

Always-on register block이 system suspend 상태에서 PMSM을 유지·제어합니다.

syscon@410000 {
        compatible = "brcm,bcm7425-aon-ctrl", "brcm,brcmstb-aon-ctrl";
        reg = <0x410000 0x400>;
};

Memory controller parent와 MEMC

41-83

Broadcom STB SoC에는 보통 독립적인 memory controller가 여러 개 있고, 각 controller에는 독립적으로 version이 붙는 control register, DDR PHY 등의 hardware block이 연결됩니다. 이를 parent `memory controllers` block 아래에 controller별 subnode를 두고 각 subnode에 PHY 등 여러 register resource를 연결하는 구조로 기술할 수 있습니다.

단일 MEMC instance의 `compatible`은 `brcm,brcmstb-memc`와 `simple-bus`를 포함합니다. `ranges`는 parent 공간의 child address 0과 전체 memory controller의 register 시작·길이를 담으며 DDR PHY, arbiter 등 모든 subnode를 포함합니다. `#address-cells`와 `#size-cells`는 모두 1입니다.

Broadcom MEMC 계층
MEMC simple-busmemc-arb@1000
MEMC simple-busmemc-ddr@2000
MEMC simple-busddr-phy@6000

하나의 MEMC 주소 공간 안에서 arbiter, DDR sequencer, DDR PHY가 각각 register resource를 사용합니다.

memory-controller@0 {
        compatible = "brcm,brcmstb-memc", "simple-bus";
        ranges = <0x0 0x0 0xa000>;
        #address-cells = <1>;
        #size-cells = <1>;

        memc-arb@1000 {
                ...
        };

        memc-ddr@2000 {
                ...
        };

        ddr-phy@6000 {
                ...
        };
};

DDR PHY control

84-103

MEMC는 관련 hardware resource subnode를 포함해야 합니다. DDR PHY control은 해당 memory controller의 DDR PHY control register를 나타냅니다. `compatible`은 `brcm,brcmstb-ddr-phy-v64.5` 또는 `brcm,brcmstb-ddr-phy`, `reg`는 DDR PHY register 범위와 길이입니다.

ddr-phy@6000 {
        compatible = "brcm,brcmstb-ddr-phy-v64.5";
        reg = <0x6000 0xc8>;
};

DDR memory-controller sequencer

104-123

DDR memory sequencer의 control register node입니다. `compatible`은 chip별 `brcm,bcm7425-memc-ddr`, `brcm,bcm7429-memc-ddr`, `brcm,bcm7435-memc-ddr` 중 하나와 generic `brcm,brcmstb-memc-ddr`를 사용합니다. `reg`는 DDR sequencer register 범위와 길이입니다.

memc-ddr@2000 {
        compatible = "brcm,bcm7425-memc-ddr", "brcm,brcmstb-memc-ddr";
        reg = <0x2000 0x300>;
};

MEMC arbiter

124-144

Memory controller arbiter는 bandwidth와 priority 같은 memory client allocation을 담당하며 deep sleep S3에서 내용을 복원해야 합니다. `compatible`은 `brcm,brcmstb-memc-arb-v10.0.0.0` 또는 `brcm,brcmstb-memc-arb`, `reg`는 DDR arbiter register 범위와 길이입니다.

memc-arb@1000 {
        compatible = "brcm,brcmstb-memc-arb-v10.0.0.0";
        reg = <0x1000 0x248>;
};

Broadcom STB timer block

145-166

Broadcom STB chip에는 여러 general-purpose timer를 제공하는 timer block이 있습니다. `compatible`은 chip별 `brcm,bcm7425-timers`, `brcm,bcm7429-timers`, `brcm,bcm7435-timers` 중 하나와 generic `brcm,brcmstb-timers`를 사용합니다. `reg`는 timer register 범위이고 `interrupts`는 이 block의 interrupt line입니다.

timers: timer@4067c0 {
        compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
        reg = <0x4067c0 0x40>;
        interrupts = <&periph_intc 19>;
};