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Linux 6.18.37 · Architecture

AMD Hardware Feedback Interface

AMD heterogeneous CPU의 classic/dense core 특성, runtime thread classification, CPU별 performance·efficiency ranking과 Linux scheduler 연동을 설명합니다.

Source pathDocumentation/arch/x86/amd-hfi.rst
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

amd-hfi.rst:1-133

AMD HFI는 classic core와 dense core가 섞인 heterogeneous system에서 scheduler가 thread를 적합한 core에 배치하도록 CPU별 performance·energy-efficiency capability와 workload classification을 제공합니다.

hardware는 thread switch-out 시 workload를 Default, Non-scalable, I/O bound 같은 class로 분류하고 logical-processor scope MSR로 OS에 전달합니다. shared-memory ranking table은 APIC ID와 class별 `[0-255]` performance·efficiency 값을 담습니다.

firmware는 thermal stress, silent compute, extreme low battery 같은 변화가 있으면 ranking을 갱신하고 platform interrupt를 보냅니다. `amd_hfi` driver가 PCCT 기반 shared memory를 parse하면 kernel 또는 userspace policy daemon이 새 ranking으로 task placement를 조정할 수 있습니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 .. SPDX-License-Identifier: GPL-2.0
2
3 ======================================================================
4 Hardware Feedback Interface For Hetero Core Scheduling On AMD Platform
5 ======================================================================
6
7 :Copyright: 2025 Advanced Micro Devices, Inc. All Rights Reserved.
8
9 :Author: Perry Yuan <perry.yuan@amd.com>
10 :Author: Mario Limonciello <mario.limonciello@amd.com>
11
12 Overview
13 --------
14
15 AMD Heterogeneous Core implementations are comprised of more than one
16 architectural class and CPUs are comprised of cores of various efficiency and
17 power capabilities: performance-oriented *classic cores* and power-efficient
18 *dense cores*. As such, power management strategies must be designed to
19 accommodate the complexities introduced by incorporating different core types.
20 Heterogeneous systems can also extend to more than two architectural classes
21 as well. The purpose of the scheduling feedback mechanism is to provide
22 information to the operating system scheduler in real time such that the
23 scheduler can direct threads to the optimal core.
24
25 The goal of AMD's heterogeneous architecture is to attain power benefit by
26 sending background threads to the dense cores while sending high priority
27 threads to the classic cores. From a performance perspective, sending
28 background threads to dense cores can free up power headroom and allow the
29 classic cores to optimally service demanding threads. Furthermore, the area
30 optimized nature of the dense cores allows for an increasing number of
31 physical cores. This improved core density will have positive multithreaded
32 performance impact.
33
34 AMD Heterogeneous Core Driver
35 -----------------------------
36
37 The ``amd_hfi`` driver delivers the operating system a performance and energy
38 efficiency capability data for each CPU in the system. The scheduler can use
39 the ranking data from the HFI driver to make task placement decisions.
40
41 Thread Classification and Ranking Table Interaction
42 ----------------------------------------------------
43
44 The thread classification is used to select into a ranking table that
45 describes an efficiency and performance ranking for each classification.
46
47 Threads are classified during runtime into enumerated classes. The classes
48 represent thread performance/power characteristics that may benefit from
49 special scheduling behaviors. The below table depicts an example of thread
50 classification and a preference where a given thread should be scheduled
51 based on its thread class. The real time thread classification is consumed
52 by the operating system and is used to inform the scheduler of where the
53 thread should be placed.
54
55 Thread Classification Example Table
56 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
57 +----------+----------------+-------------------------------+---------------------+---------+
58 | class ID | Classification | Preferred scheduling behavior | Preemption priority | Counter |
59 +----------+----------------+-------------------------------+---------------------+---------+
60 | 0 | Default | Performant | Highest | |
61 +----------+----------------+-------------------------------+---------------------+---------+
62 | 1 | Non-scalable | Efficient | Lowest | PMCx1A1 |
63 +----------+----------------+-------------------------------+---------------------+---------+
64 | 2 | I/O bound | Efficient | Lowest | PMCx044 |
65 +----------+----------------+-------------------------------+---------------------+---------+
66
67 Thread classification is performed by the hardware each time that the thread is switched out.
68 Threads that don't meet any hardware specified criteria are classified as "default".
69
70 AMD Hardware Feedback Interface
71 --------------------------------
72
73 The Hardware Feedback Interface provides to the operating system information
74 about the performance and energy efficiency of each CPU in the system. Each
75 capability is given as a unit-less quantity in the range [0-255]. A higher
76 performance value indicates higher performance capability, and a higher
77 efficiency value indicates more efficiency. Energy efficiency and performance
78 are reported in separate capabilities in the shared memory based ranking table.
79
80 These capabilities may change at runtime as a result of changes in the
81 operating conditions of the system or the action of external factors.
82 Power Management firmware is responsible for detecting events that require
83 a reordering of the performance and efficiency ranking. Table updates happen
84 relatively infrequently and occur on the time scale of seconds or more.
85
86 The following events trigger a table update:
87 * Thermal Stress Events
88 * Silent Compute
89 * Extreme Low Battery Scenarios
90
91 The kernel or a userspace policy daemon can use these capabilities to modify
92 task placement decisions. For instance, if either the performance or energy
93 capabilities of a given logical processor becomes zero, it is an indication
94 that the hardware recommends to the operating system to not schedule any tasks
95 on that processor for performance or energy efficiency reasons, respectively.
96
97 Implementation details for Linux
98 --------------------------------
99
100 The implementation of threads scheduling consists of the following steps:
101
102 1. A thread is spawned and scheduled to the ideal core using the default
103 heterogeneous scheduling policy.
104 2. The processor profiles thread execution and assigns an enumerated
105 classification ID.
106 This classification is communicated to the OS via logical processor
107 scope MSR.
108 3. During the thread context switch out the operating system consumes the
109 workload (WL) classification which resides in a logical processor scope MSR.
110 4. The OS triggers the hardware to clear its history by writing to an MSR,
111 after consuming the WL classification and before switching in the new thread.
112 5. If due to the classification, ranking table, and processor availability,
113 the thread is not on its ideal processor, the OS will then consider
114 scheduling the thread on its ideal processor (if available).
115
116 Ranking Table
117 -------------
118 The ranking table is a shared memory region that is used to communicate the
119 performance and energy efficiency capabilities of each CPU in the system.
120
121 The ranking table design includes rankings for each APIC ID in the system and
122 rankings both for performance and efficiency for each workload classification.
123
124 .. kernel-doc:: drivers/platform/x86/amd/hfi/hfi.c
125 :doc: amd_shmem_info
126
127 Ranking Table update
128 ---------------------------
129 The power management firmware issues an platform interrupt after updating the
130 ranking table and is ready for the operating system to consume it. CPUs receive
131 such interrupt and read new ranking table from shared memory which PCCT table
132 has provided, then ``amd_hfi`` driver parses the new table to provide new
133 consume data for scheduling decisions.
134

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

문서 정보

1-11

이 `GPL-2.0` 문서는 AMD platform의 heterogeneous core scheduling을 위한 Hardware Feedback Interface를 설명합니다. Copyright는 2025 Advanced Micro Devices, Inc.에 있으며 저자는 Perry Yuan(`perry.yuan@amd.com`)과 Mario Limonciello(`mario.limonciello@amd.com`)입니다.

heterogeneous core scheduling 개요

12-33

AMD Heterogeneous Core 구현은 둘 이상의 architectural class로 이루어집니다. CPU에는 performance 지향 `classic cores`와 power-efficient `dense cores`처럼 efficiency와 power capability가 서로 다른 core가 섞여 있습니다. 따라서 power-management strategy는 여러 core type에서 생기는 복잡성을 수용해야 하며 heterogeneous system은 두 class를 넘어 더 많은 architectural class로 확장될 수 있습니다.

scheduling feedback mechanism은 operating-system scheduler에 real-time 정보를 제공해 thread를 optimal core로 보낼 수 있게 하는 것이 목적입니다.

AMD heterogeneous architecture는 background thread를 dense core로, high-priority thread를 classic core로 보내 power 이점을 얻으려 합니다. background thread를 dense core로 옮기면 power headroom이 생겨 classic core가 demanding thread를 최적으로 처리할 수 있습니다.

dense core는 area-optimized이므로 physical core 수를 늘릴 수 있고, 높아진 core density는 multithreaded performance에 긍정적인 영향을 줍니다.

AMD heterogeneous core driver

34-40

`amd_hfi` driver는 system의 각 CPU에 대한 performance capability와 energy-efficiency capability data를 operating system에 전달합니다. scheduler는 HFI driver의 ranking data를 task-placement decision에 사용할 수 있습니다.

thread classification과 ranking table

41-69

thread classification은 classification별 efficiency·performance ranking을 설명하는 ranking table의 항목을 선택하는 데 사용합니다.

hardware는 runtime에 thread를 enumerated class로 분류합니다. 각 class는 특별한 scheduling behavior가 이득이 될 수 있는 thread의 performance/power 특성을 나타냅니다. operating system은 real-time classification을 소비해 scheduler에 thread를 어디에 배치할지 알립니다.

Thread Classification Example Table
class IDClassificationPreferred scheduling behaviorPreemption priorityCounter
0DefaultPerformantHighest
1Non-scalableEfficientLowestPMCx1A1
2I/O boundEfficientLowestPMCx044
분류 시점hardware는 thread가 switch out될 때마다 classification을 수행합니다.
defaulthardware가 지정한 어떤 criterion도 충족하지 않는 thread는 default로 분류합니다.

원문의 ASCII 표를 동일한 열과 값으로 구조화했습니다.

hardware는 thread가 switch out될 때마다 thread classification을 수행합니다. hardware가 지정한 criterion을 하나도 충족하지 않는 thread는 `default`로 분류됩니다.

Hardware Feedback Interface capability

70-95

Hardware Feedback Interface는 system의 각 CPU가 가진 performance와 energy efficiency 정보를 operating system에 제공합니다. 각 capability는 `[0-255]` 범위의 unit-less quantity입니다. performance 값이 높을수록 performance capability가 크고 efficiency 값이 높을수록 더 효율적입니다.

energy efficiency와 performance는 shared-memory 기반 ranking table에서 서로 별도 capability로 보고됩니다.

capability는 system operating condition이나 external factor의 변화에 따라 runtime에 바뀔 수 있습니다. Power Management firmware는 performance·efficiency ranking을 재정렬해야 하는 event를 감지합니다. table update는 비교적 드물고 수 초 이상의 time scale로 발생합니다.

다음 event가 ranking table update를 유발합니다.

  • Thermal Stress Events
  • Silent Compute
  • Extreme Low Battery Scenarios

kernel 또는 userspace policy daemon은 capability를 이용해 task-placement decision을 수정할 수 있습니다. 특정 logical processor의 performance 또는 energy capability가 0이면 hardware가 각각 performance 또는 energy-efficiency 이유로 그 processor에 task를 schedule하지 말 것을 operating system에 권고한다는 뜻입니다.

Linux thread scheduling 구현 절차

96-115

thread scheduling 구현은 다음 단계로 이루어집니다.

  • thread를 생성하고 default heterogeneous scheduling policy로 ideal core에 schedule합니다.
  • processor가 thread execution을 profile해 enumerated classification ID를 할당하고 logical processor scope MSR로 OS에 전달합니다.
  • thread context switch-out 중 operating system이 logical processor scope MSR의 workload (WL) classification을 소비합니다.
  • OS는 WL classification을 소비한 뒤 새 thread를 switch in하기 전에 MSR에 써서 hardware history를 clear합니다.
  • classification, ranking table, processor availability를 고려했을 때 thread가 ideal processor에 없다면 OS는 사용 가능한 ideal processor로 옮겨 schedule할지 검토합니다.

shared-memory ranking table

116-126

ranking table은 system의 각 CPU가 가진 performance 및 energy-efficiency capability를 전달하는 shared-memory region입니다.

table에는 system의 각 APIC ID에 대한 ranking과 workload classification별 performance·efficiency ranking이 들어 있습니다.

`drivers/platform/x86/amd/hfi/hfi.c`의 `amd_shmem_info` kernel-doc가 shared-memory layout의 구현 세부를 설명합니다.

.. kernel-doc:: drivers/platform/x86/amd/hfi/hfi.c
   :doc: amd_shmem_info

ranking table update

127-133

power-management firmware는 ranking table을 갱신해 operating system이 소비할 준비가 되면 platform interrupt를 발생시킵니다.

CPU는 interrupt를 받고 PCCT table이 제공한 shared memory에서 새 ranking table을 읽습니다. 그 뒤 `amd_hfi` driver가 새 table을 parse해 scheduling decision에 사용할 새 data를 제공합니다.