요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
==============
OpenRISC Linux
==============
This is a port of Linux to the OpenRISC class of microprocessors; the initial
target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
For information about OpenRISC processors and ongoing development:
======= ==============================
website https://openrisc.io
email linux-openrisc@vger.kernel.org
======= ==============================
---------------------------------------------------------------------
Build instructions for OpenRISC toolchain and Linux
===================================================
In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator. Steps to get these bits
in place are outlined here.
1) Toolchain
Toolchain binaries can be obtained from openrisc.io or our github releases page.
Instructions for building the different toolchains can be found on openrisc.io
or Stafford's toolchain build and release scripts.
========== ==========================================================
binaries https://github.com/stffrdhrn/or1k-toolchain-build/releases
toolchains https://openrisc.io/software
building https://github.com/stffrdhrn/or1k-toolchain-build
========== ==========================================================
2) Building
Build the Linux kernel as usual::
make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig
make ARCH=openrisc CROSS_COMPILE="or1k-linux-"
If you want to embed initramfs in the kernel, also pass ``CONFIG_INITRAMFS_SOURCE``. For example::
make ARCH=openrisc CROSS_COMPILE="or1k-linux-" CONFIG_INITRAMFS_SOURCE="path/to/rootfs path/to/devnodes"
For more information on this, please check Documentation/filesystems/ramfs-rootfs-initramfs.rst.
3) Running on FPGA (optional)
The OpenRISC community typically uses FuseSoC to manage building and programming
an SoC into an FPGA. The below is an example of programming a De0 Nano
development board with the OpenRISC SoC. During the build FPGA RTL is code
downloaded from the FuseSoC IP cores repository and built using the FPGA vendor
tools. Binaries are loaded onto the board with openocd.
::
git clone https://github.com/olofk/fusesoc
cd fusesoc
sudo pip install -e .
fusesoc init
fusesoc build de0_nano
fusesoc pgm de0_nano
openocd -f interface/altera-usb-blaster.cfg \
-f board/or1k_generic.cfg
telnet localhost 4444
> init
> halt; load_image vmlinux ; reset
4) Running on a Simulator (optional)
QEMU is a processor emulator which we recommend for simulating the OpenRISC
platform. Please follow the OpenRISC instructions on the QEMU website to get
Linux running on QEMU. You can build QEMU yourself, but your Linux distribution
likely provides binary packages to support OpenRISC.
============= ======================================================
qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC
============= ======================================================
---------------------------------------------------------------------
Terminology
===========
In the code, the following particles are used on symbols to limit the scope
to more or less specific processor implementations:
========= =======================================
openrisc: the OpenRISC class of processors
or1k: the OpenRISC 1000 family of processors
or1200: the OpenRISC 1200 processor
========= =======================================
---------------------------------------------------------------------
History
========
18-11-2003 Matjaz Breskvar (phoenix@bsemi.com)
initial port of linux to OpenRISC/or32 architecture.
all the core stuff is implemented and seams usable.
08-12-2003 Matjaz Breskvar (phoenix@bsemi.com)
complete change of TLB miss handling.
rewrite of exceptions handling.
fully functional sash-3.6 in default initrd.
a much improved version with changes all around.
10-04-2004 Matjaz Breskvar (phoenix@bsemi.com)
a lot of bugfixes all over.
ethernet support, functional http and telnet servers.
running many standard linux apps.
26-06-2004 Matjaz Breskvar (phoenix@bsemi.com)
port to 2.6.x
30-11-2004 Matjaz Breskvar (phoenix@bsemi.com)
lots of bugfixes and enhancements.
added opencores framebuffer driver.
09-10-2010 Jonas Bonn (jonas@southpole.se)
major rewrite to bring up to par with upstream Linux 2.6.36
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
OpenRISC Linux port
1-15Linux를 OpenRISC microprocessor class에 port한 문서이며 최초 target은 32-bit OpenRISC 1000 family (`or1k`)입니다.
| Contact | 주소 |
|---|---|
| `website` | `https://openrisc.io` |
| `email` | `linux-openrisc@vger.kernel.org` |
Toolchain과 kernel build
16-47OpenRISC Linux를 build/run하려면 최소한 기본 toolchain이 필요하고 경우에 따라 architecture simulator도 필요합니다. Binary와 build instruction은 다음 위치에서 구합니다.
| Resource | URL |
|---|---|
| `binaries` | `https://github.com/stffrdhrn/or1k-toolchain-build/releases` |
| `toolchains` | `https://openrisc.io/software` |
| `building` | `https://github.com/stffrdhrn/or1k-toolchain-build` |
일반 Linux kernel build command는 다음과 같습니다.
make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig
make ARCH=openrisc CROSS_COMPILE="or1k-linux-"
Kernel에 initramfs를 embed하려면 `CONFIG_INITRAMFS_SOURCE`도 전달합니다.
make ARCH=openrisc CROSS_COMPILE="or1k-linux-" CONFIG_INITRAMFS_SOURCE="path/to/rootfs path/to/devnodes"
자세한 설명은 `Documentation/filesystems/ramfs-rootfs-initramfs.rst`를 참조합니다.
FPGA와 QEMU에서 실행
48-83OpenRISC community는 보통 FuseSoC로 FPGA SoC build/programming을 관리합니다. De0 Nano 예제에서는 FuseSoC IP core repository의 RTL을 vendor tool로 build하고 OpenOCD로 binary를 board에 적재합니다.
git clone https://github.com/olofk/fusesoc
cd fusesoc
sudo pip install -e .
fusesoc init
fusesoc build de0_nano
fusesoc pgm de0_nano
openocd -f interface/altera-usb-blaster.cfg \
-f board/or1k_generic.cfg
telnet localhost 4444
> init
> halt; load_image vmlinux ; reset
QEMU는 권장 processor emulator입니다. Distribution package를 사용할 수 있고 직접 build할 수도 있으며 OpenRISC platform instruction은 아래 문서를 따릅니다.
| Resource | URL |
|---|---|
| `qemu openrisc` | `https://wiki.qemu.org/Documentation/Platforms/OpenRISC` |
Source symbol terminology
84-99Source code symbol의 prefix/particle은 processor implementation 범위를 구분합니다.
| Particle | 범위 |
|---|---|
| `openrisc:` | `the OpenRISC class of processors` |
| `or1k:` | `the OpenRISC 1000 family of processors` |
| `or1200:` | `the OpenRISC 1200 processor` |
Port history
100-127| Date | Maintainer | 변경 |
|---|---|---|
| 2003-11-18 | Matjaz Breskvar | OpenRISC/or32 최초 port, core 기능 구현 |
| 2003-12-08 | Matjaz Breskvar | TLB miss와 exception handling 재작성, sash-3.6 initrd |
| 2004-04-10 | Matjaz Breskvar | Bugfix, Ethernet, HTTP/telnet server와 표준 application |
| 2004-06-26 | Matjaz Breskvar | Linux 2.6.x port |
| 2004-11-30 | Matjaz Breskvar | Bugfix/enhancement와 OpenCores framebuffer driver |
| 2010-10-09 | Jonas Bonn | Upstream Linux 2.6.36 수준으로 major rewrite |
요약과 해설
openrisc_port.rst:1-127OpenRISC port는 같은 kernel image를 FPGA와 QEMU에서 검증할 수 있는 흐름을 제공합니다. `ARCH=openrisc`, `or1k-linux-` toolchain, FuseSoC/OpenOCD 또는 QEMU가 핵심 구성 요소입니다.
Toolchain에서 target platform까지의 두 실행 경로입니다.
Symbol particle이 구현 범위를 좁힙니다.