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Linux 6.18.37 · Architecture

Ingenic JZ47xx Timer/Counter Unit

JZ47xx TCU channel mode, clock, IRQ topology와 Linux driver 분할을 설명합니다.

Source pathDocumentation/arch/mips/ingenic-tcu.rst
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

ingenic-tcu.rst:1-71

TCU는 clock, interrupt, clocksource, PWM, watchdog framework가 같은 register block을 공유하는 multi-function device입니다. SoC generation마다 channel 수, TCU1/TCU2 mode와 IRQ sharing이 달라 driver가 variant data를 정확히 적용해야 합니다.

TCU shared register architecture
TCU registersShared regmapClock driver
TCU registersShared regmapIRQ chip
TCU registersShared regmapTimer/OST/PWM/watchdog

동일 regmap을 여러 Linux subsystem driver가 공유합니다.

Channel generation 차이
GenerationTCU2독립 channel IRQ
JZ4740 이하없음0, 1
JZ4725B50
JZ4750 이상1, 25

SoC 세대별 mode와 독립 IRQ가 다릅니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 .. SPDX-License-Identifier: GPL-2.0
2
3 ===============================================
4 Ingenic JZ47xx SoCs Timer/Counter Unit hardware
5 ===============================================
6
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
8 hardware block. It features up to eight channels, that can be used as
9 counters, timers, or PWM.
10
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
12 have eight channels.
13
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
17
18 - Each one of the TCU channels has its own clock, which can be reparented to three
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
20
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
22 format in their register space.
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
24 OST clocks.
25
26 - Each TCU channel works in one of two modes:
27
28 - mode TCU1: channels cannot work in sleep mode, but are easier to
29 operate.
30 - mode TCU2: channels can work in sleep mode, but the operation is a bit
31 more complicated than with TCU1 channels.
32
33 - The mode of each TCU channel depends on the SoC used:
34
35 - On the oldest SoCs (up to JZ4740), all of the eight channels operate in
36 TCU1 mode.
37 - On JZ4725B, channel 5 operates as TCU2, the others operate as TCU1.
38 - On newest SoCs (JZ4750 and above), channels 1-2 operate as TCU2, the
39 others operate as TCU1.
40
41 - Each channel can generate an interrupt. Some channels share an interrupt
42 line, some don't, and this changes between SoC versions:
43
44 - on older SoCs (JZ4740 and below), channel 0 and channel 1 have their
45 own interrupt line; channels 2-7 share the last interrupt line.
46 - On JZ4725B, channel 0 has its own interrupt; channels 1-5 share one
47 interrupt line; the OST uses the last interrupt line.
48 - on newer SoCs (JZ4750 and above), channel 5 has its own interrupt;
49 channels 0-4 and (if eight channels) 6-7 all share one interrupt line;
50 the OST uses the last interrupt line.
51
52 Implementation
53 ==============
54
55 The functionalities of the TCU hardware are spread across multiple drivers:
56
57 =========== =====
58 clocks drivers/clk/ingenic/tcu.c
59 interrupts drivers/irqchip/irq-ingenic-tcu.c
60 timers drivers/clocksource/ingenic-timer.c
61 OST drivers/clocksource/ingenic-ost.c
62 PWM drivers/pwm/pwm-jz4740.c
63 watchdog drivers/watchdog/jz4740_wdt.c
64 =========== =====
65
66 Because various functionalities of the TCU that belong to different drivers
67 and frameworks can be controlled from the same registers, all of these
68 drivers access their registers through the same regmap.
69
70 For more information regarding the devicetree bindings of the TCU drivers,
71 have a look at Documentation/devicetree/bindings/timer/ingenic,tcu.yaml.
72

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

TCU hardware와 clock

1-24

GPL-2.0 문서입니다. Ingenic JZ47xx SoC의 Timer/Counter Unit은 counter, timer, PWM으로 쓸 수 있는 최대 8-channel multi-function block입니다.

SoC/BlockChannel 또는 timer 특성
JZ4725B, JZ4750, JZ4755TCU channel 6개
기타 JZ47xxTCU channel 8개
JZ4725B OST별도 32-bit programmable Operating System Timer
JZ4760B 이상 OST64-bit programmable timer

각 TCU channel은 독립 clock과 `TCSR` register를 가지며 parent를 `pclk`, `ext`, `rtc` 중 하나로 바꾸고 gate/reclock할 수 있습니다. Watchdog와 OST도 같은 format의 `TCSR`를 자기 register space에 갖고, TCU gate/ungate register는 watchdog과 OST clock도 제어합니다.

TCU1/TCU2 mode와 interrupt

25-50
SoCTCU mode 배치
JZ4740 이하8개 channel 모두 TCU1
JZ4725BChannel 5는 TCU2, 나머지는 TCU1
JZ4750 이상Channel 1-2는 TCU2, 나머지는 TCU1

TCU1 channel은 sleep mode에서 동작하지 않지만 조작이 쉽습니다. TCU2 channel은 sleep 중에도 동작하는 대신 operation이 더 복잡합니다.

SoC독립 IRQ공유 IRQOST IRQ
JZ4740 이하Channel 0, 1 각각Channel 2-7해당 없음
JZ4725BChannel 0Channel 1-5마지막 line
JZ4750 이상Channel 5Channel 0-4와 8-channel SoC의 6-7마지막 line

Linux driver 분할과 shared regmap

51-71

TCU 기능은 Linux framework별 여러 driver에 나뉩니다.

기능Source path
`clocks``drivers/clk/ingenic/tcu.c`
`interrupts``drivers/irqchip/irq-ingenic-tcu.c`
`timers``drivers/clocksource/ingenic-timer.c`
`OST``drivers/clocksource/ingenic-ost.c`
`PWM``drivers/pwm/pwm-jz4740.c`
`watchdog``drivers/watchdog/jz4740_wdt.c`

서로 다른 driver와 framework의 기능이 같은 register에서 제어되므로 모든 driver는 동일한 `regmap`을 통해 접근합니다.

Devicetree binding은 `Documentation/devicetree/bindings/timer/ingenic,tcu.yaml`을 참조합니다.