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1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
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===================================================
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Scalable Matrix Extension support for AArch64 Linux
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===================================================
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This document outlines briefly the interface provided to userspace by Linux in
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order to support use of the ARM Scalable Matrix Extension (SME).
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This is an outline of the most important features and issues only and not
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intended to be exhaustive. It should be read in conjunction with the SVE
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documentation in sve.rst which provides details on the Streaming SVE mode
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included in SME.
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This document does not aim to describe the SME architecture or programmer's
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model. To aid understanding, a minimal description of relevant programmer's
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model features for SME is included in Appendix A.
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1. General
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-----------
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* PSTATE.SM, PSTATE.ZA, the streaming mode vector length, the ZA and (when
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present) ZTn register state and TPIDR2_EL0 are tracked per thread.
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* The presence of SME is reported to userspace via HWCAP2_SME in the aux vector
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AT_HWCAP2 entry. Presence of this flag implies the presence of the SME
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instructions and registers, and the Linux-specific system interfaces
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described in this document. SME is reported in /proc/cpuinfo as "sme".
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* The presence of SME2 is reported to userspace via HWCAP2_SME2 in the
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aux vector AT_HWCAP2 entry. Presence of this flag implies the presence of
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the SME2 instructions and ZT0, and the Linux-specific system interfaces
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described in this document. SME2 is reported in /proc/cpuinfo as "sme2".
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* Support for the execution of SME instructions in userspace can also be
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detected by reading the CPU ID register ID_AA64PFR1_EL1 using an MRS
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instruction, and checking that the value of the SME field is nonzero. [3]
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It does not guarantee the presence of the system interfaces described in the
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following sections: software that needs to verify that those interfaces are
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present must check for HWCAP2_SME instead.
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* There are a number of optional SME features, presence of these is reported
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through AT_HWCAP2 through:
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HWCAP2_SME_I16I64
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HWCAP2_SME_F64F64
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HWCAP2_SME_I8I32
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HWCAP2_SME_F16F32
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HWCAP2_SME_B16F32
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HWCAP2_SME_F32F32
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HWCAP2_SME_FA64
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HWCAP2_SME2
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This list may be extended over time as the SME architecture evolves.
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These extensions are also reported via the CPU ID register ID_AA64SMFR0_EL1,
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which userspace can read using an MRS instruction. See elf_hwcaps.txt and
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cpu-feature-registers.txt for details.
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* Debuggers should restrict themselves to interacting with the target via the
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NT_ARM_SVE, NT_ARM_SSVE, NT_ARM_ZA and NT_ARM_ZT regsets. The recommended
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way of detecting support for these regsets is to connect to a target process
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first and then attempt a
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ptrace(PTRACE_GETREGSET, pid, NT_ARM_<regset>, &iov).
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* Whenever ZA register values are exchanged in memory between userspace and
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the kernel, the register value is encoded in memory as a series of horizontal
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vectors from 0 to VL/8-1 stored in the same endianness invariant format as is
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used for SVE vectors.
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* On thread creation PSTATE.ZA and TPIDR2_EL0 are preserved unless CLONE_VM
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is specified, in which case PSTATE.ZA is set to 0 and TPIDR2_EL0 is set to 0.
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2. Vector lengths
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------------------
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SME defines a second vector length similar to the SVE vector length which
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controls the size of the streaming mode SVE vectors and the ZA matrix array.
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The ZA matrix is square with each side having as many bytes as a streaming
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mode SVE vector.
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3. System call behaviour
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-------------------------
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* On syscall PSTATE.ZA is preserved, if PSTATE.ZA==1 then the contents of the
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ZA matrix and ZTn (if present) are preserved.
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* On syscall PSTATE.SM will be cleared and the SVE registers will be handled
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as per the standard SVE ABI.
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* None of the SVE registers, ZA or ZTn are used to pass arguments to
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or receive results from any syscall.
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* On process creation (eg, clone()) the newly created process will have
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PSTATE.SM cleared.
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* All other SME state of a thread, including the currently configured vector
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length, the state of the PR_SME_VL_INHERIT flag, and the deferred vector
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length (if any), is preserved across all syscalls, subject to the specific
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exceptions for execve() described in section 6.
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4. Signal handling
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-------------------
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* Signal handlers are invoked with PSTATE.SM=0, PSTATE.ZA=0, and TPIDR2_EL0=0.
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* A new signal frame record TPIDR2_MAGIC is added formatted as a struct
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tpidr2_context to allow access to TPIDR2_EL0 from signal handlers.
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* A new signal frame record za_context encodes the ZA register contents on
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signal delivery. [1]
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* The signal frame record for ZA always contains basic metadata, in particular
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the thread's vector length (in za_context.vl).
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* The ZA matrix may or may not be included in the record, depending on
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the value of PSTATE.ZA. The registers are present if and only if:
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za_context.head.size >= ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(za_context.vl))
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in which case PSTATE.ZA == 1.
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* If matrix data is present, the remainder of the record has a vl-dependent
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size and layout. Macros ZA_SIG_* are defined [1] to facilitate access to
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them.
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* The matrix is stored as a series of horizontal vectors in the same format as
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is used for SVE vectors.
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* If the ZA context is too big to fit in sigcontext.__reserved[], then extra
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space is allocated on the stack, an extra_context record is written in
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__reserved[] referencing this space. za_context is then written in the
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extra space. Refer to [1] for further details about this mechanism.
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* If ZTn is supported and PSTATE.ZA==1 then a signal frame record for ZTn will
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be generated.
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* The signal record for ZTn has magic ZT_MAGIC (0x5a544e01) and consists of a
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standard signal frame header followed by a struct zt_context specifying
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the number of ZTn registers supported by the system, then zt_context.nregs
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blocks of 64 bytes of data per register.
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5. Signal return
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-----------------
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When returning from a signal handler:
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* If there is no za_context record in the signal frame, or if the record is
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present but contains no register data as described in the previous section,
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then ZA is disabled.
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* If za_context is present in the signal frame and contains matrix data then
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PSTATE.ZA is set to 1 and ZA is populated with the specified data.
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* The vector length cannot be changed via signal return. If za_context.vl in
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the signal frame does not match the current vector length, the signal return
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attempt is treated as illegal, resulting in a forced SIGSEGV.
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* If ZTn is not supported or PSTATE.ZA==0 then it is illegal to have a
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signal frame record for ZTn, resulting in a forced SIGSEGV.
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6. prctl extensions
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--------------------
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Some new prctl() calls are added to allow programs to manage the SME vector
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length:
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prctl(PR_SME_SET_VL, unsigned long arg)
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Sets the vector length of the calling thread and related flags, where
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arg == vl | flags. Other threads of the calling process are unaffected.
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vl is the desired vector length, where sve_vl_valid(vl) must be true.
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flags:
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PR_SME_VL_INHERIT
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Inherit the current vector length across execve(). Otherwise, the
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vector length is reset to the system default at execve(). (See
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Section 9.)
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PR_SME_SET_VL_ONEXEC
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Defer the requested vector length change until the next execve()
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performed by this thread.
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The effect is equivalent to implicit execution of the following
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call immediately after the next execve() (if any) by the thread:
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prctl(PR_SME_SET_VL, arg & ~PR_SME_SET_VL_ONEXEC)
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This allows launching of a new program with a different vector
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length, while avoiding runtime side effects in the caller.
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Without PR_SME_SET_VL_ONEXEC, the requested change takes effect
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immediately.
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Return value: a nonnegative on success, or a negative value on error:
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EINVAL: SME not supported, invalid vector length requested, or
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invalid flags.
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On success:
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* Either the calling thread's vector length or the deferred vector length
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to be applied at the next execve() by the thread (dependent on whether
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PR_SME_SET_VL_ONEXEC is present in arg), is set to the largest value
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supported by the system that is less than or equal to vl. If vl ==
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SVE_VL_MAX, the value set will be the largest value supported by the
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system.
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* Any previously outstanding deferred vector length change in the calling
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thread is cancelled.
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* The returned value describes the resulting configuration, encoded as for
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PR_SME_GET_VL. The vector length reported in this value is the new
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current vector length for this thread if PR_SME_SET_VL_ONEXEC was not
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present in arg; otherwise, the reported vector length is the deferred
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vector length that will be applied at the next execve() by the calling
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thread.
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* Changing the vector length causes all of ZA, ZTn, P0..P15, FFR and all
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bits of Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
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unspecified, including both streaming and non-streaming SVE state.
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Calling PR_SME_SET_VL with vl equal to the thread's current vector
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length, or calling PR_SME_SET_VL with the PR_SME_SET_VL_ONEXEC flag,
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does not constitute a change to the vector length for this purpose.
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* Changing the vector length causes PSTATE.ZA to be cleared.
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Calling PR_SME_SET_VL with vl equal to the thread's current vector
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length, or calling PR_SME_SET_VL with the PR_SME_SET_VL_ONEXEC flag,
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does not constitute a change to the vector length for this purpose.
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prctl(PR_SME_GET_VL)
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Gets the vector length of the calling thread.
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The following flag may be OR-ed into the result:
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PR_SME_VL_INHERIT
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Vector length will be inherited across execve().
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There is no way to determine whether there is an outstanding deferred
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vector length change (which would only normally be the case between a
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fork() or vfork() and the corresponding execve() in typical use).
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To extract the vector length from the result, bitwise and it with
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PR_SME_VL_LEN_MASK.
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Return value: a nonnegative value on success, or a negative value on error:
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EINVAL: SME not supported.
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7. ptrace extensions
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---------------------
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* A new regset NT_ARM_SSVE is defined for access to streaming mode SVE
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state via PTRACE_GETREGSET and PTRACE_SETREGSET, this is documented in
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sve.rst.
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* A new regset NT_ARM_ZA is defined for ZA state for access to ZA state via
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PTRACE_GETREGSET and PTRACE_SETREGSET.
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Refer to [2] for definitions.
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The regset data starts with struct user_za_header, containing:
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size
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Size of the complete regset, in bytes.
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This depends on vl and possibly on other things in the future.
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If a call to PTRACE_GETREGSET requests less data than the value of
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size, the caller can allocate a larger buffer and retry in order to
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read the complete regset.
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max_size
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Maximum size in bytes that the regset can grow to for the target
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thread. The regset won't grow bigger than this even if the target
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thread changes its vector length etc.
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vl
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Target thread's current streaming vector length, in bytes.
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max_vl
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Maximum possible streaming vector length for the target thread.
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flags
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Zero or more of the following flags, which have the same
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meaning and behaviour as the corresponding PR_SET_VL_* flags:
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SME_PT_VL_INHERIT
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SME_PT_VL_ONEXEC (SETREGSET only).
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* The effects of changing the vector length and/or flags are equivalent to
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those documented for PR_SME_SET_VL.
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The caller must make a further GETREGSET call if it needs to know what VL is
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actually set by SETREGSET, unless is it known in advance that the requested
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VL is supported.
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* The size and layout of the payload depends on the header fields. The
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ZA_PT_ZA*() macros are provided to facilitate access to the data.
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* In either case, for SETREGSET it is permissible to omit the payload, in which
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case the vector length and flags are changed and PSTATE.ZA is set to 0
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(along with any consequences of those changes). If a payload is provided
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then PSTATE.ZA will be set to 1.
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* For SETREGSET, if the requested VL is not supported, the effect will be the
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same as if the payload were omitted, except that an EIO error is reported.
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No attempt is made to translate the payload data to the correct layout
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for the vector length actually set. It is up to the caller to translate the
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payload layout for the actual VL and retry.
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* The effect of writing a partial, incomplete payload is unspecified.
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* A new regset NT_ARM_ZT is defined for access to ZTn state via
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PTRACE_GETREGSET and PTRACE_SETREGSET.
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* The NT_ARM_ZT regset consists of a single 512 bit register.
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* When PSTATE.ZA==0 reads of NT_ARM_ZT will report all bits of ZTn as 0.
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* Writes to NT_ARM_ZT will set PSTATE.ZA to 1.
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* If any register data is provided along with SME_PT_VL_ONEXEC then the
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registers data will be interpreted with the current vector length, not
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the vector length configured for use on exec.
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8. ELF coredump extensions
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---------------------------
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* NT_ARM_SSVE notes will be added to each coredump for
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each thread of the dumped process. The contents will be equivalent to the
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data that would have been read if a PTRACE_GETREGSET of the corresponding
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type were executed for each thread when the coredump was generated.
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* A NT_ARM_ZA note will be added to each coredump for each thread of the
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dumped process. The contents will be equivalent to the data that would have
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been read if a PTRACE_GETREGSET of NT_ARM_ZA were executed for each thread
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when the coredump was generated.
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* A NT_ARM_ZT note will be added to each coredump for each thread of the
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dumped process. The contents will be equivalent to the data that would have
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been read if a PTRACE_GETREGSET of NT_ARM_ZT were executed for each thread
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when the coredump was generated.
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* The NT_ARM_TLS note will be extended to two registers, the second register
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will contain TPIDR2_EL0 on systems that support SME and will be read as
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zero with writes ignored otherwise.
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9. System runtime configuration
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--------------------------------
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* To mitigate the ABI impact of expansion of the signal frame, a policy
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mechanism is provided for administrators, distro maintainers and developers
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to set the default vector length for userspace processes:
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/proc/sys/abi/sme_default_vector_length
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Writing the text representation of an integer to this file sets the system
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default vector length to the specified value rounded to a supported value
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using the same rules as for setting vector length via PR_SME_SET_VL.
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The result can be determined by reopening the file and reading its
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contents.
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At boot, the default vector length is initially set to 32 or the maximum
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supported vector length, whichever is smaller and supported. This
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determines the initial vector length of the init process (PID 1).
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Reading this file returns the current system default vector length.
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* At every execve() call, the new vector length of the new process is set to
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the system default vector length, unless
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* PR_SME_VL_INHERIT (or equivalently SME_PT_VL_INHERIT) is set for the
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calling thread, or
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* a deferred vector length change is pending, established via the
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PR_SME_SET_VL_ONEXEC flag (or SME_PT_VL_ONEXEC).
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* Modifying the system default vector length does not affect the vector length
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of any existing process or thread that does not make an execve() call.
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Appendix A. SME programmer's model (informative)
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=================================================
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This section provides a minimal description of the additions made by SME to the
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ARMv8-A programmer's model that are relevant to this document.
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Note: This section is for information only and not intended to be complete or
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to replace any architectural specification.
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A.1. Registers
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---------------
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In A64 state, SME adds the following:
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* A new mode, streaming mode, in which a subset of the normal FPSIMD and SVE
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features are available. When supported EL0 software may enter and leave
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streaming mode at any time.
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For best system performance it is strongly encouraged for software to enable
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streaming mode only when it is actively being used.
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* A new vector length controlling the size of ZA and the Z registers when in
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streaming mode, separately to the vector length used for SVE when not in
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streaming mode. There is no requirement that either the currently selected
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vector length or the set of vector lengths supported for the two modes in
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a given system have any relationship. The streaming mode vector length
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is referred to as SVL.
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* A new ZA matrix register. This is a square matrix of SVLxSVL bits. Most
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operations on ZA require that streaming mode be enabled but ZA can be
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enabled without streaming mode in order to load, save and retain data.
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For best system performance it is strongly encouraged for software to enable
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ZA only when it is actively being used.
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* A new ZT0 register is introduced when SME2 is present. This is a 512 bit
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register which is accessible when PSTATE.ZA is set, as ZA itself is.
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* Two new 1 bit fields in PSTATE which may be controlled via the SMSTART and
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SMSTOP instructions or by access to the SVCR system register:
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* PSTATE.ZA, if this is 1 then the ZA matrix is accessible and has valid
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data while if it is 0 then ZA can not be accessed. When PSTATE.ZA is
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changed from 0 to 1 all bits in ZA are cleared.
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* PSTATE.SM, if this is 1 then the PE is in streaming mode. When the value
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of PSTATE.SM is changed then it is implementation defined if the subset
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of the floating point register bits valid in both modes may be retained.
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Any other bits will be cleared.
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References
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==========
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[1] arch/arm64/include/uapi/asm/sigcontext.h
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AArch64 Linux signal ABI definitions
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[2] arch/arm64/include/uapi/asm/ptrace.h
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AArch64 Linux ptrace ABI definitions
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[3] Documentation/arch/arm64/cpu-feature-registers.rst
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
개요와 일반 규칙
1-74이 문서는 ARM Scalable Matrix Extension(SME)을 지원하기 위해 Linux가 사용자 공간에 제공하는 interface를 간략히 설명합니다. 완전한 architecture 설명은 아니며, SME에 포함된 Streaming SVE mode의 세부 사항은 `sve.rst`와 함께 읽어야 합니다. Appendix A에는 이 문서를 이해하는 데 필요한 최소 programmer's model이 있습니다.
`PSTATE.SM`, `PSTATE.ZA`, streaming mode vector length, `ZA`, 지원되는 경우 `ZTn`, 그리고 `TPIDR2_EL0` 상태는 thread별로 추적합니다.
| 표시 | 보고 경로 | 보장하는 내용 |
|---|---|---|
| `HWCAP2_SME` | `AT_HWCAP2`, `/proc/cpuinfo: sme` | SME 명령·register와 이 문서의 Linux interface |
| `HWCAP2_SME2` | `AT_HWCAP2`, `/proc/cpuinfo: sme2` | SME2 명령, `ZT0`, Linux interface |
| `HWCAP2_SME_I16I64` | `AT_HWCAP2` | Optional SME feature |
| `HWCAP2_SME_F64F64` | `AT_HWCAP2` | Optional SME feature |
| `HWCAP2_SME_I8I32` | `AT_HWCAP2` | Optional SME feature |
| `HWCAP2_SME_F16F32` | `AT_HWCAP2` | Optional SME feature |
| `HWCAP2_SME_B16F32` | `AT_HWCAP2` | Optional SME feature |
| `HWCAP2_SME_F32F32` | `AT_HWCAP2` | Optional SME feature |
| `HWCAP2_SME_FA64` | `AT_HWCAP2` | Optional SME feature |
| `ID_AA64SMFR0_EL1` | EL0 `MRS` | Optional extension field; 목록은 향후 확장 가능 |
`ID_AA64PFR1_EL1.SME`가 0이 아닌지 `MRS`로 읽으면 SME 명령 실행 지원은 찾을 수 있지만 Linux-specific system interface까지 보장하지는 않습니다. 그 interface가 필요하면 반드시 `HWCAP2_SME`를 검사해야 합니다. 자세한 feature register 규칙은 `elf_hwcaps.txt`와 `cpu-feature-registers.txt`를 참조합니다.
Debugger는 대상과 `NT_ARM_SVE`, `NT_ARM_SSVE`, `NT_ARM_ZA`, `NT_ARM_ZT` regset으로만 상호 작용해야 합니다. 지원 여부는 먼저 target process에 연결한 뒤 다음 `PTRACE_GETREGSET`을 시도하는 방식이 권장됩니다.
ptrace(PTRACE_GETREGSET, pid, NT_ARM_<regset>, &iov).User/kernel 사이에서 `ZA` 값을 memory로 교환할 때는 0부터 `VL/8-1`까지의 horizontal vector 연속으로 encoding하고, SVE vector와 같은 endianness-invariant 형식을 사용합니다.
Thread 생성 시 `PSTATE.ZA`와 `TPIDR2_EL0`는 보존됩니다. 단, `CLONE_VM`을 지정하면 둘 다 0으로 설정합니다.
Streaming vector length
75-83SME는 SVE vector length와 비슷한 두 번째 vector length를 정의합니다. 이 값은 streaming mode SVE vector와 `ZA` matrix array의 크기를 제어합니다. `ZA`는 정사각형이며 각 변의 byte 수가 streaming mode SVE vector의 byte 수와 같습니다.
System call 동작
84-104Syscall에서는 `PSTATE.ZA`를 보존합니다. `PSTATE.ZA == 1`이면 `ZA` matrix와 지원되는 `ZTn` 내용도 보존합니다. 반면 `PSTATE.SM`은 clear하고 SVE register는 standard SVE ABI에 따라 처리합니다.
SVE register, `ZA`, `ZTn`은 syscall argument나 return value 전달에 사용하지 않습니다. `clone()` 같은 process 생성 뒤 새 process의 `PSTATE.SM`도 clear됩니다.
현재 vector length, `PR_SME_VL_INHERIT`, deferred vector length를 포함한 다른 SME thread state는 모든 syscall에서 보존됩니다. 예외는 6절에 명시한 `execve()` 규칙뿐입니다.
Signal 전달
105-144Signal handler는 `PSTATE.SM=0`, `PSTATE.ZA=0`, `TPIDR2_EL0=0` 상태로 호출됩니다. Handler가 이전 값을 읽고 복원할 수 있도록 signal frame에 새 record를 추가합니다.
| Record | 내용 | 존재 조건 |
|---|---|---|
| `tpidr2_context` / `TPIDR2_MAGIC` | `TPIDR2_EL0` | SME signal frame |
| `za_context` | `za_context.vl` metadata와 선택적 `ZA` matrix | `head.size >= ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(vl))`이면 data 포함, 즉 `PSTATE.ZA == 1` |
| `zt_context` / `ZT_MAGIC (0x5a544e01)` | `nregs`와 register당 64 bytes | `ZTn` 지원 및 `PSTATE.ZA == 1` |
Matrix data가 있으면 record의 나머지 size와 layout은 `vl`에 따라 달라지며 `ZA_SIG_*` macro로 접근합니다. Matrix는 SVE vector와 같은 형식의 horizontal vector 연속으로 저장합니다.
`ZA` context가 `sigcontext.__reserved[]`에 들어가지 않으면 stack에 extra space를 할당하고 `__reserved[]`의 `extra_context`가 그 공간을 가리키게 한 뒤 `za_context`를 extra space에 기록합니다.
Signal return
145-164Signal frame에 `za_context`가 없거나 record에 matrix data가 없으면 `ZA`를 disable합니다. Matrix data가 있으면 `PSTATE.ZA=1`로 만들고 지정한 data로 `ZA`를 채웁니다.
Signal return으로 vector length를 바꿀 수 없습니다. `za_context.vl`이 현재 vector length와 다르면 illegal return으로 처리해 강제 `SIGSEGV`를 발생시킵니다.
`ZTn`을 지원하지 않거나 `PSTATE.ZA == 0`인데 `ZTn` signal record가 있으면 역시 illegal frame이며 강제 `SIGSEGV`가 발생합니다.
prctl vector-length 제어
165-260`prctl(PR_SME_SET_VL, unsigned long arg)`는 calling thread의 SME vector length와 관련 flag를 설정합니다. `arg == vl | flags`이고 다른 thread에는 영향을 주지 않습니다. `vl`은 `sve_vl_valid(vl)`을 만족해야 합니다.
| Flag | 효과 |
|---|---|
| `PR_SME_VL_INHERIT` | `execve()` 뒤 현재 vector length 상속; 없으면 system default로 reset |
| `PR_SME_SET_VL_ONEXEC` | 요청한 변경을 이 thread의 다음 `execve()` 직후까지 연기 |
`PR_SME_SET_VL_ONEXEC`의 효과는 다음 호출을 다음 `execve()` 직후 암묵적으로 실행한 것과 같습니다. Caller의 runtime side effect 없이 다른 vector length로 새 program을 시작할 수 있습니다.
prctl(PR_SME_SET_VL, arg & ~PR_SME_SET_VL_ONEXEC)Flag가 없으면 변경은 즉시 적용됩니다. 성공 시 nonnegative 값을, SME 미지원·invalid vector length·invalid flag이면 `EINVAL`을 반환합니다.
- 현재 또는 deferred vector length는 system이 지원하는 값 중 요청 `vl` 이하의 가장 큰 값이 됩니다. `vl == SVE_VL_MAX`이면 system 최대값을 선택합니다.
- 이전에 남아 있던 deferred vector-length change는 취소됩니다.
- Return value는 `PR_SME_GET_VL` 형식입니다. `ONEXEC`이 없으면 새 현재값, 있으면 다음 `execve()`에 적용할 deferred 값을 보고합니다.
- 실제 vector length가 바뀌면 `ZA`, `ZTn`, `P0..P15`, `FFR`, 그리고 각 `Z0..Z31`의 `[127:0]` 이외 bit가 streaming/non-streaming state 모두 unspecified가 됩니다.
- 실제 vector length가 바뀌면 `PSTATE.ZA`를 clear합니다. 현재값과 같은 `vl` 또는 `ONEXEC` 호출은 이 목적에서 변경으로 보지 않습니다.
`prctl(PR_SME_GET_VL)`은 calling thread의 vector length를 반환하고 결과에 `PR_SME_VL_INHERIT`가 OR될 수 있습니다. Outstanding deferred change의 존재는 조회할 수 없습니다. Vector length는 결과를 `PR_SME_VL_LEN_MASK`와 bitwise AND해 추출합니다. SME가 없으면 `EINVAL`입니다.
ptrace regset
261-343`NT_ARM_SSVE`는 streaming SVE state를 다루며 세부 규칙은 `sve.rst`에 있습니다. `NT_ARM_ZA`는 `PTRACE_GETREGSET`/`PTRACE_SETREGSET`으로 `ZA` state에 접근합니다. 정의는 `arch/arm64/include/uapi/asm/ptrace.h`에 있습니다.
| `struct user_za_header` field | 의미 |
|---|---|
| `size` | 현재 complete regset byte size; buffer가 작으면 큰 buffer로 재시도 |
| `max_size` | Target vector length가 바뀌어도 넘지 않는 최대 byte size |
| `vl` | Target의 현재 streaming vector length(byte) |
| `max_vl` | Target이 가질 수 있는 최대 streaming vector length |
| `flags` | `SME_PT_VL_INHERIT`, SETREGSET 전용 `SME_PT_VL_ONEXEC` |
Vector length나 flag를 바꾸는 효과는 `PR_SME_SET_VL`과 같습니다. SETREGSET이 실제로 선택한 VL을 알아야 하고 요청값 지원 여부를 미리 모르면 추가 GETREGSET이 필요합니다. Payload size/layout은 header에 의존하며 `ZA_PT_ZA*()` macro로 접근합니다.
| Regset/상황 | Read | Write |
|---|---|---|
| `NT_ARM_ZA` | Header와 선택적 ZA payload | Payload 생략 시 `PSTATE.ZA=0`; 제공 시 `PSTATE.ZA=1` |
| `NT_ARM_ZT` | `PSTATE.ZA=0`이면 `ZTn` bit를 모두 0으로 보고 | 512-bit register data를 쓰면 `PSTATE.ZA=1` |
| 지원하지 않는 VL | - | Payload 생략과 같은 상태 변경 후 `EIO`; caller가 실제 VL layout으로 변환해 재시도 |
Partial/incomplete payload의 효과는 unspecified입니다. `SME_PT_VL_ONEXEC`과 register data를 함께 주면 data는 exec용 deferred VL이 아니라 현재 vector length로 해석합니다.
ELF coredump
344-365Dump되는 process의 각 thread마다 ptrace에서 읽을 수 있는 것과 같은 state를 ELF note로 기록합니다.
| Note | 내용 |
|---|---|
| `NT_ARM_SSVE` | Streaming-mode SVE state |
| `NT_ARM_ZA` | `PTRACE_GETREGSET(NT_ARM_ZA)`와 같은 ZA state |
| `NT_ARM_ZT` | `PTRACE_GETREGSET(NT_ARM_ZT)`와 같은 ZTn state |
| `NT_ARM_TLS` | 두 register로 확장; SME system의 두 번째 register는 `TPIDR2_EL0`, 미지원 system은 read 0/write 무시 |
System runtime configuration
366-400Signal frame 확장의 ABI 영향을 줄이기 위해 administrator, distribution maintainer, developer가 사용자 process의 default vector length를 정하는 policy file을 제공합니다: `/proc/sys/abi/sme_default_vector_length`.
정수를 쓰면 `PR_SME_SET_VL`과 같은 규칙으로 지원 가능한 값에 round하여 system default를 정합니다. File을 다시 열어 읽으면 결과를 확인할 수 있습니다. Boot 초기값은 32와 지원 최대 vector length 중 더 작으면서 지원되는 값이며 init process(PID 1)의 초기값이 됩니다.
각 `execve()`에서 새 process는 system default를 받습니다. 단, caller에 `PR_SME_VL_INHERIT` 또는 `SME_PT_VL_INHERIT`가 있거나 `PR_SME_SET_VL_ONEXEC`/`SME_PT_VL_ONEXEC`으로 deferred change가 있으면 예외입니다. Default 변경은 이후 `execve()`를 하지 않는 기존 process와 thread에 영향을 주지 않습니다.
Appendix A와 참고 자료
401-461Appendix A는 SME가 ARMv8-A programmer's model에 추가한 최소 사항만 설명하며 architecture specification을 대체하지 않습니다.
| 상태 | 크기/제어 | 핵심 동작 |
|---|---|---|
| Streaming mode | `PSTATE.SM` | Normal FPSIMD/SVE의 subset; 사용 중일 때만 enable 권장 |
| Streaming vector length | `SVL` | Streaming `Z`와 `ZA` 크기; normal SVE VL과 독립 |
| `ZA` | `SVL x SVL` bits | 대부분 streaming mode 필요; load/save/retain에는 mode 없이 enable 가능 |
| `ZT0` | 512 bits | SME2에서 추가되고 `PSTATE.ZA=1`일 때 접근 |
| `PSTATE.ZA` | 1 bit | 0→1 전환 시 `ZA` 모든 bit clear |
| `PSTATE.SM` | 1 bit | 변경 시 두 mode 공통 FP bit 보존 여부는 implementation-defined, 나머지는 clear |
Software는 `SMSTART`, `SMSTOP` 또는 `SVCR` system register로 `PSTATE.SM`과 `PSTATE.ZA`를 제어합니다. 성능을 위해 streaming mode와 `ZA`는 실제 사용 중일 때만 enable하는 것이 강하게 권장됩니다.
| Reference | 내용 |
|---|---|
| `arch/arm64/include/uapi/asm/sigcontext.h` | AArch64 Linux signal ABI |
| `arch/arm64/include/uapi/asm/ptrace.h` | AArch64 Linux ptrace ABI |
| `Documentation/arch/arm64/cpu-feature-registers.rst` | CPU feature register interface |
요약과 해설
sme.rst:1-461SME는 normal SVE와 독립적인 Streaming vector length, `ZA` matrix, SME2의 `ZT0`를 추가합니다. Linux ABI의 핵심은 mode 전환 때 live register 범위를 명확히 하고 signal·ptrace·exec 경계에서 VL과 matrix state를 일관되게 보존하거나 무효화하는 것입니다.
Thread state가 syscall, signal, exec 경계를 통과할 때 적용되는 핵심 전환입니다.
Architecture state와 Linux 관찰 경로를 연결합니다.