요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
DSB trigger와 programming mode
sysfs-bus-coresight-devices-tpdm:25-59DSB trigger type·timestamp를 boolean 값으로 제어하고 dsb_mode bitfields로 input test mode, performance mode와 high-performance byte lane을 선택합니다.
DSB indexed edge detection
sysfs-bus-coresight-devices-tpdm:61-110ctrl_idx로 0-255 edge detector를 먼저 선택한 뒤 ctrl_val과 ctrl_mask를 기록하며 EDCR·EDCMR arrays에서 control 값과 masks를 읽습니다.
DSB trigger patterns와 mux selection
sysfs-bus-coresight-devices-tpdm:112-172DSB trigger pattern·mask, 일반 pattern·mask, pattern timestamp·type과 32개 mux select registers를 설정하거나 읽습니다.
CMB collection과 pattern controls
sysfs-bus-coresight-devices-tpdm:174-228CMB는 continuous 또는 trace-on-change collection mode를 선택하고 trigger pattern·mask, data pattern·mask와 pattern timestamp를 제어합니다.
CMB timestamps와 mux selection
sysfs-bus-coresight-devices-tpdm:230-259CMB trigger timestamp와 모든 trace packets의 timestamp 요청을 제어하고 32개 mux select registers를 설정하거나 읽습니다.
MCMB lane controls
sysfs-bus-coresight-devices-tpdm:261-274MCMB output pattern-match cross-trigger에 참여할 lane과 individual lane enablement를 선택합니다.
Hardware context label
sysfs-bus-coresight-devices-tpdm:276-280label은 TPDM device의 hardware context information을 보여 줍니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
1
What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
2
Date: January 2023
3
KernelVersion: 6.2
4
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
5
Description:
6
(Write) Run integration test for tpdm. Integration test
7
will generate test data for tpdm. It can help to make
8
sure that the trace path is enabled and the link configurations
9
are fine.
11
Accepts only one of the 2 values - 1 or 2.
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1 : Generate 64 bits data
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2 : Generate 32 bits data
15
What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
19
Description:
20
(Write) Reset the dataset of the tpdm.
22
Accepts only one value - 1.
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1 : Reset the dataset of the tpdm
25
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
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Date: March 2023
27
KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
29
Description:
30
(RW) Set/Get the trigger type of the DSB for tpdm.
32
Accepts only one of the 2 values - 0 or 1.
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0 : Set the DSB trigger type to false
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1 : Set the DSB trigger type to true
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
41
(RW) Set/Get the trigger timestamp of the DSB for tpdm.
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Accepts only one of the 2 values - 0 or 1.
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0 : Set the DSB trigger type to false
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1 : Set the DSB trigger type to true
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
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Date: March 2023
49
KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
51
Description:
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(RW) Set/Get the programming mode of the DSB for tpdm.
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Accepts the value needs to be greater than 0. What data
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bits do is listed below.
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Bit[0:1] : Test mode control bit for choosing the inputs.
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Bit[3] : Set to 0 for low performance mode. Set to 1 for high
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performance mode.
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Bit[4:8] : Select byte lane for high performance mode.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(RW) Set/Get the index number of the edge detection for the DSB
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subunit TPDM. Since there are at most 256 edge detections, this
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value ranges from 0 to 255.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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Write a data to control the edge detection corresponding to
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the index number. Before writing data to this sysfs file,
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"ctrl_idx" should be written first to configure the index
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number of the edge detection which needs to be controlled.
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Accepts only one of the following values.
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0 - Rising edge detection
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1 - Falling edge detection
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2 - Rising and falling edge detection (toggle detection)
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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Write a data to mask the edge detection corresponding to the index
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number. Before writing data to this sysfs file, "ctrl_idx" should
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be written first to configure the index number of the edge detection
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which needs to be masked.
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Accepts only one of the 2 values - 0 or 1.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
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Date: March 2023
100
KernelVersion: 6.7
101
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
102
Description:
103
Read a set of the edge control value of the DSB in TPDM.
105
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
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Date: March 2023
107
KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
109
Description:
110
Read a set of the edge control mask of the DSB in TPDM.
112
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]
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Date: March 2023
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KernelVersion: 6.7
115
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(RW) Set/Get the value of the trigger pattern for the DSB
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subunit TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]
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Date: March 2023
122
KernelVersion: 6.7
123
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
124
Description:
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(RW) Set/Get the mask of the trigger pattern for the DSB
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subunit TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(RW) Set/Get the value of the pattern for the DSB subunit TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]
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Date: March 2023
137
KernelVersion: 6.7
138
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(RW) Set/Get the mask of the pattern for the DSB subunit TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts
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Date: March 2023
144
KernelVersion: 6.7
145
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(Write) Set the pattern timestamp of DSB tpdm. Read
148
the pattern timestamp of DSB tpdm.
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Accepts only one of the 2 values - 0 or 1.
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0 : Disable DSB pattern timestamp.
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1 : Enable DSB pattern timestamp.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(Write) Set the pattern type of DSB tpdm. Read
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the pattern type of DSB tpdm.
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Accepts only one of the 2 values - 0 or 1.
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0 : Set the DSB pattern type to value.
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1 : Set the DSB pattern type to toggle.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]
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Date: March 2023
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KernelVersion: 6.7
169
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(RW) Set/Get the MSR(mux select register) for the DSB subunit
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TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode
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Date: January 2024
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KernelVersion: 6.9
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description: (Write) Set the data collection mode of CMB tpdm. Continuous
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change creates CMB data set elements on every CMBCLK edge.
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Trace-on-change creates CMB data set elements only when a new
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data set element differs in value from the previous element
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in a CMB data set.
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Accepts only one of the 2 values - 0 or 1.
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0 : Continuous CMB collection mode.
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1 : Trace-on-change CMB collection mode.
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What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1]
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Date: January 2024
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KernelVersion: 6.9
191
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Description:
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(RW) Set/Get the value of the trigger pattern for the CMB
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subunit TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1]
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Date: January 2024
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KernelVersion: 6.9
199
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
200
Description:
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(RW) Set/Get the mask of the trigger pattern for the CMB
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subunit TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1]
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Date: January 2024
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KernelVersion: 6.9
207
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
208
Description:
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(RW) Set/Get the value of the pattern for the CMB subunit TPDM.
211
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1]
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Date: January 2024
213
KernelVersion: 6.9
214
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
215
Description:
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(RW) Set/Get the mask of the pattern for the CMB subunit TPDM.
218
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts
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Date: January 2024
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KernelVersion: 6.9
221
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
222
Description:
223
(Write) Set the pattern timestamp of CMB tpdm. Read
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the pattern timestamp of CMB tpdm.
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Accepts only one of the 2 values - 0 or 1.
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0 : Disable CMB pattern timestamp.
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1 : Enable CMB pattern timestamp.
230
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts
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Date: January 2024
232
KernelVersion: 6.9
233
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
234
Description:
235
(RW) Set/Get the trigger timestamp of the CMB for tpdm.
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Accepts only one of the 2 values - 0 or 1.
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0 : Set the CMB trigger type to false
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1 : Set the CMB trigger type to true
241
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all
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Date: January 2024
243
KernelVersion: 6.9
244
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
245
Description:
246
(RW) Read or write the status of timestamp upon all interface.
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Only value 0 and 1 can be written to this node. Set this node to 1 to request
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timestamp to all trace packet.
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Accepts only one of the 2 values - 0 or 1.
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0 : Disable the timestamp of all trace packets.
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1 : Enable the timestamp of all trace packets.
253
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31]
254
Date: January 2024
255
KernelVersion: 6.9
256
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
257
Description:
258
(RW) Set/Get the MSR(mux select register) for the CMB subunit
259
TPDM.
261
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane
262
Date: Feb 2025
263
KernelVersion 6.15
264
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
265
Description:
266
(RW) Set/Get which lane participates in the output pattern
267
match cross trigger mechanism for the MCMB subunit TPDM.
269
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select
270
Date: Feb 2025
271
KernelVersion 6.15
272
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
273
Description:
274
(RW) Set/Get the enablement of the individual lane.
276
What: /sys/bus/coresight/devices/<tpdm-name>/label
277
Date: Aug 2025
278
KernelVersion 6.18
279
Contact: Mao Jinlong <quic_jinlmao@quicinc.com>
280
Description: (Read) Show hardware context information of device.
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
TPDM integration test와 dataset reset
1-23| What | Date / Kernel / Contact | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/integration_test | 2023년 1월 / 6.2 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (Write) TPDM integration test를 실행합니다. Integration test는 TPDM test data를 생성하며 trace path가 enable되어 있고 link configurations가 올바른지 확인하는 데 도움이 됩니다. 두 값 중 하나만 허용합니다. 1은 64 bits data를, 2는 32 bits data를 생성합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/reset_dataset | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (Write) TPDM dataset을 reset합니다. 값 1만 허용하며, 1은 TPDM dataset을 reset합니다. |
DSB trigger와 programming mode
25-59| What | 공통 metadata | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB의 trigger type을 설정하거나 가져옵니다. 0 또는 1만 허용합니다. 0은 DSB trigger type을 false로, 1은 true로 설정합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB의 trigger timestamp를 설정하거나 가져옵니다. 0 또는 1만 허용합니다. 원문 값 설명에 따르면 0은 DSB trigger type을 false로, 1은 true로 설정합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_mode | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB의 programming mode를 설정하거나 가져옵니다. 허용되는 값은 0보다 커야 하며 각 data bit의 의미는 아래 표와 같습니다. |
| dsb_mode bits | 전문 번역 |
|---|---|
| Bit[0:1] | Inputs를 선택하는 test mode control bit입니다. |
| Bit[3] | 0은 low performance mode, 1은 high performance mode로 설정합니다. |
| Bit[4:8] | High performance mode에서 사용할 byte lane을 선택합니다. |
DSB indexed edge detection
61-110| What | 공통 metadata | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB subunit의 edge detection index number를 설정하거나 가져옵니다. Edge detections가 최대 256개이므로 값 범위는 0-255입니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | Index number에 해당하는 edge detection을 제어할 data를 씁니다. 이 sysfs file에 data를 쓰기 전에 ctrl_idx를 먼저 써서 제어할 edge detection index number를 구성해야 합니다. 0은 rising edge, 1은 falling edge, 2는 rising and falling edge(toggle detection)입니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | Index number에 해당하는 edge detection을 mask할 data를 씁니다. 이 sysfs file에 data를 쓰기 전에 ctrl_idx를 먼저 써서 mask할 edge detection index number를 구성해야 합니다. 0 또는 1만 허용합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | TPDM의 DSB edge control values 집합을 읽습니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | TPDM의 DSB edge control masks 집합을 읽습니다. |
ctrl_idx (0-255)→ctrl_val (0 rising / 1 falling / 2 toggle)→EDCR[0:15]
ctrl_idx (0-255)→ctrl_mask (0 or 1)→EDCMR[0:7]
쓰기 전에 ctrl_idx로 detector를 선택하고, control value 또는 mask를 적용한 뒤 register arrays에서 집합 상태를 읽습니다.
DSB trigger, pattern과 mux selection
112-172| What | 공통 metadata | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB subunit의 trigger pattern 값을 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB subunit의 trigger pattern mask를 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB subunit의 pattern 값을 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB subunit의 pattern mask를 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (Write) DSB TPDM의 pattern timestamp를 설정하고 읽습니다. 0은 DSB pattern timestamp를 disable하고 1은 enable합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (Write) DSB TPDM의 pattern type을 설정하고 읽습니다. 0은 DSB pattern type을 value로, 1은 toggle로 설정합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31] | 2023년 3월 / 6.7 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM DSB subunit의 MSR(mux select register)을 설정하거나 가져옵니다. |
CMB collection과 pattern controls
174-228| What | 공통 metadata | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/cmb_mode | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (Write) CMB TPDM의 data collection mode를 설정합니다. Continuous change는 매 CMBCLK edge마다 CMB dataset elements를 생성합니다. Trace-on-change는 CMB dataset의 새 element 값이 이전 element와 다를 때만 CMB dataset elements를 생성합니다. 0은 continuous CMB collection mode, 1은 trace-on-change CMB collection mode입니다. |
| /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1] | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM CMB subunit의 trigger pattern 값을 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1] | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM CMB subunit의 trigger pattern mask를 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1] | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM CMB subunit의 pattern 값을 설정하거나 가져옵니다. 원문 What path는 dsb_patt/tpr[0:1]로 표기되어 있습니다. |
| /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1] | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM CMB subunit의 pattern mask를 설정하거나 가져옵니다. 원문 What path는 dsb_patt/tpmr[0:1]로 표기되어 있습니다. |
| /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (Write) CMB TPDM의 pattern timestamp를 설정하고 읽습니다. 0은 CMB pattern timestamp를 disable하고 1은 enable합니다. |
CMB timestamps와 mux selection
230-259| What | 공통 metadata | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM CMB의 trigger timestamp를 설정하거나 가져옵니다. 0 또는 1만 허용합니다. 원문 값 설명에 따르면 0은 CMB trigger type을 false로, 1은 true로 설정합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) 모든 interface의 timestamp 상태를 읽거나 씁니다. 이 node에는 0과 1만 쓸 수 있으며 1로 설정하면 모든 trace packet에 timestamp를 요청합니다. 0은 모든 trace packets의 timestamp를 disable하고 1은 enable합니다. |
| /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31] | 2024년 1월 / 6.9 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM CMB subunit의 MSR(mux select register)을 설정하거나 가져옵니다. |
MCMB lane controls
261-274| What | Date / Kernel / Contact | 전문 번역 |
|---|---|---|
| /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane | 2025년 2월 / 6.15 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) TPDM MCMB subunit의 output pattern match cross trigger mechanism에 참여할 lane을 설정하거나 가져옵니다. |
| /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select | 2025년 2월 / 6.15 / Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> | (RW) Individual lane의 enablement를 설정하거나 가져옵니다. |
TPDM hardware context
276-280| 항목 | 전문 번역 |
|---|---|
| What | /sys/bus/coresight/devices/<tpdm-name>/label |
| Date | 2025년 8월 |
| KernelVersion | 6.18 |
| Contact | Mao Jinlong <quic_jinlmao@quicinc.com> |
| Description | (Read) Device의 hardware context information을 보여 줍니다. |
Integration test와 dataset reset
sysfs-bus-coresight-devices-tpdm:1-23integration_test는 64-bit 또는 32-bit test data를 생성해 trace path와 link configuration을 검증하고 reset_dataset은 값 1로 TPDM dataset을 reset합니다.